Overview
The FDG6322C is a dual N- and P-channel logic level enhancement mode field effect transistor (FET) produced by ON Semiconductor. This device is designed for low voltage applications and serves as a replacement for bipolar digital transistors and small signal MOSFETs. It utilizes ON Semiconductor's proprietary high cell density DMOS technology to minimize on-state resistance. The FDG6322C is particularly suited for applications where low gate drive requirements are necessary, such as in 3 V circuits, and it features a very small package outline in SC70-6.
Key Specifications
Parameter | Symbol | N-Channel | P-Channel | Units |
---|---|---|---|---|
Drain-Source Voltage | VDSS | 25 | -25 | V |
Gate-Source Voltage | VGSS | 8 | -8 | V |
Continuous Drain Current | ID | 0.22 | -0.41 | A |
Pulsed Drain Current | ID | 0.65 | -1.2 | A |
Maximum Power Dissipation | PD | 0.3 | 0.3 | W |
Operating and Storage Temperature Range | TJ, TSTG | -55 to 150 | -55 to 150 | °C |
Electrostatic Discharge Rating (Human Body Model) | ESD | 6 kV | 6 kV | kV |
Thermal Resistance, Junction-to-Ambient | RθJA | 415 | 415 | °C/W |
Gate Threshold Voltage | VGS(th) | 0.65 to 1.5 | -0.65 to -1.5 | V |
Static Drain-Source On-Resistance | RDS(ON) | 2.6 to 4 Ω @ VGS = 4.5 V | 0.85 to 1.1 Ω @ VGS = -4.5 V | Ω |
Key Features
- Low gate drive requirements, allowing direct operation in 3 V circuits (VGS(th) < 1.5 V)
- Gate-Source Zener for ESD ruggedness (>6 kV Human Body Model)
- Very small package outline in SC70-6
- No bias resistors required, replacing several different digital transistors with different bias resistor values
- High cell density DMOS technology to minimize on-state resistance
Applications
The FDG6322C is suitable for a variety of low voltage applications, including but not limited to:
- Replacement for bipolar digital transistors and small signal MOSFETs
- Low voltage logic circuits
- Power management and switching applications
- Portable electronic devices requiring low power consumption
- Automotive and industrial control systems
Q & A
- What is the FDG6322C? The FDG6322C is a dual N- and P-channel logic level enhancement mode field effect transistor produced by ON Semiconductor.
- What are the key applications of the FDG6322C? It is used in low voltage applications, replacing bipolar digital transistors and small signal MOSFETs, and in power management and switching applications.
- What is the package type of the FDG6322C? The FDG6322C comes in a very small SC70-6 package outline.
- What are the maximum drain-source voltages for the N- and P-channels? The maximum drain-source voltage for the N-channel is 25 V, and for the P-channel, it is -25 V.
- What is the electrostatic discharge (ESD) rating of the FDG6322C? The ESD rating is >6 kV according to the Human Body Model.
- What is the thermal resistance, junction-to-ambient (RθJA) of the FDG6322C? The RθJA is 415 °C/W.
- What are the gate threshold voltages for the N- and P-channels? The gate threshold voltage for the N-channel is 0.65 to 1.5 V, and for the P-channel, it is -0.65 to -1.5 V.
- Does the FDG6322C require bias resistors? No, the FDG6322C does not require bias resistors, making it a convenient replacement for several different digital transistors.
- What is the maximum continuous drain current for the N- and P-channels? The maximum continuous drain current for the N-channel is 0.22 A, and for the P-channel, it is -0.41 A.
- What is the operating temperature range of the FDG6322C? The operating and storage temperature range is -55 to 150 °C.