Overview
The NB2304AI1DR2G is a 3.3 V zero delay clock buffer produced by onsemi. This component is designed to distribute high-speed clocks in various high-performance applications, including PCs, workstations, datacom, and telecom systems. It features an on-chip PLL that locks to an input clock presented on the REF pin, ensuring minimal propagation delay and skew. The device is available in an 8-pin SOIC package and is Pb-free, halogen-free, and RoHS compliant.
Key Specifications
| Parameter | Description | Min | Max | Unit |
|---|---|---|---|---|
| Supply Voltage (VDD) | Supply voltage | 3.0 | 3.6 | V |
| Operating Temperature (TA) | Ambient temperature | -40 | 85 | °C |
| Input Frequency Range | Frequency range of the input clock | 15 | 133 | MHz |
| Output-Output Skew | Slew between outputs on the same bank | 200 | ps | |
| Device-Device Skew | Slew between outputs of different devices | 500 | ps | |
| Cycle-to-Cycle Jitter | Jitter measured at 66.67 MHz | 200 | ps | |
| Input-Output Propagation Delay | Delay from REF rising edge to FBK rising edge | 250 | ps | |
| PLL Lock Time | Time for PLL to lock to the input clock | 1.0 | ms |
Key Features
- Zero input-output propagation delay, adjustable by capacitive load on FBK input
- Multiple configurations (NB2304AI1 and NB2304AI2) with different output frequencies
- Multiple low-skew outputs with output-output skew < 200 ps
- Device-device skew < 500 ps
- Two banks of two outputs each
- Cycle-to-cycle jitter less than 200 ps
- Available in space-saving 8-pin 150 mil SOIC package
- 3.3 V operation
- Advanced 0.35 μm CMOS technology
- Guaranteed across commercial and industrial temperature ranges
- Pb-free, halogen-free, and RoHS compliant
Applications
The NB2304AI1DR2G is suitable for various high-performance applications, including:
- PCs and workstations
- Datacom and telecom systems
- Other high-speed clock distribution needs
Q & A
- What is the primary function of the NB2304AI1DR2G?
The primary function is to distribute high-speed clocks with zero delay in various applications.
- What is the input frequency range of the NB2304AI1DR2G?
The input frequency range is from 15 MHz to 133 MHz.
- How many output banks does the NB2304AI1DR2G have?
The device has two banks of two outputs each.
- What is the maximum output-output skew?
The maximum output-output skew is less than 200 ps.
- What is the device-device skew?
The device-device skew is less than 500 ps.
- What is the cycle-to-cycle jitter at 66.67 MHz?
The cycle-to-cycle jitter is less than 200 ps.
- How long does the PLL take to lock to the input clock?
The PLL lock time is approximately 1.0 ms.
- What is the operating voltage of the NB2304AI1DR2G?
The operating voltage is 3.3 V.
- Is the NB2304AI1DR2G RoHS compliant?
Yes, the device is Pb-free, halogen-free, and RoHS compliant.
- What package type is the NB2304AI1DR2G available in?
The device is available in an 8-pin 150 mil SOIC package.
