Overview
The AD9516-3BCPZ, produced by Analog Devices Inc., is a 14-output clock generator that integrates a 2.0 GHz voltage-controlled oscillator (VCO) and a phase-locked loop (PLL). This device is designed to provide multi-output clock distribution with subpicosecond jitter performance, making it ideal for applications requiring low jitter and phase noise. The on-chip VCO tunes from 1.75 GHz to 2.25 GHz, and an external VCO/VCXO up to 2.4 GHz can also be used. The AD9516-3BCPZ is particularly beneficial for maximizing data converter performance and other applications with stringent phase noise and jitter requirements.
Key Specifications
Parameter | Value | Unit | Comments |
---|---|---|---|
VCO Frequency Range | 1.75 GHz to 2.25 GHz | GHz | On-chip VCO |
External VCO/VCXO Frequency | Up to 2.4 GHz | GHz | Optional |
LVPECL Outputs | 6 pairs (12 outputs) | - | Operate up to 1.6 GHz |
LVDS Outputs | 4 pairs (8 outputs) | - | Operate up to 800 MHz, reconfigurable as 2 CMOS outputs each |
CMOS Outputs | Up to 16 outputs | - | Operate up to 250 MHz |
Output Jitter (LVPECL) | 225 fs rms | fs | Additive output jitter |
Output Jitter (LVDS) | 275 fs rms | fs | Additive output jitter |
Channel-to-Channel Skew | < 10 ps | ps | Paired outputs |
Divider Range (LVPECL) | 1 to 32 | - | - |
Divider Range (LVDS/CMOS) | Up to 1024 | - | - |
Power Supply | 3.3 V (nominal) | V | Single supply, VCP up to 5 V for external VCO |
Operating Temperature | −40°C to +85°C | °C | Industrial range |
Package | 64-lead LFCSP (9mm x 9mm w/ EP) | - | - |
Key Features
- On-chip PLL and VCO for low jitter and phase noise performance
- Optional external VCO/VCXO up to 2.4 GHz
- Six LVPECL outputs (in three pairs) operating up to 1.6 GHz
- Four LVDS outputs (in two pairs) operating up to 800 MHz, reconfigurable as CMOS outputs
- Programmable dividers and coarse phase delay for each output pair
- Automatic and manual reference switchover/holdover modes
- Reference monitoring capability
- Digital or analog lock detect, selectable
- Automatic synchronization of all outputs on power-up and manual output synchronization available
Applications
- Low jitter, low phase noise clock distribution
- 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
- Forward error correction (G.710)
- Clocking high-speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
- High performance wireless transceivers
- ATE and high performance instrumentation
Q & A
- What is the frequency range of the on-chip VCO in the AD9516-3BCPZ?
The on-chip VCO tunes from 1.75 GHz to 2.25 GHz.
- Can the AD9516-3BCPZ use an external VCO/VCXO?
Yes, an external VCO/VCXO up to 2.4 GHz can be used.
- How many LVPECL and LVDS outputs does the AD9516-3BCPZ have?
The device features six LVPECL outputs (in three pairs) and four LVDS outputs (in two pairs).
- What are the operating frequencies of the LVPECL, LVDS, and CMOS outputs?
The LVPECL outputs operate up to 1.6 GHz, the LVDS outputs up to 800 MHz, and the CMOS outputs up to 250 MHz.
- What is the range of division for the LVPECL and LVDS/CMOS outputs?
The LVPECL outputs have a divider range of 1 to 32, while the LVDS/CMOS outputs have a range up to 1024.
- What is the typical power supply voltage for the AD9516-3BCPZ?
The device operates from a single 3.3 V supply, with the option to connect the charge pump supply (VCP) to 5 V for an external VCO.
- What is the operating temperature range of the AD9516-3BCPZ?
The device is specified for operation over the industrial range of −40°C to +85°C.
- In what package is the AD9516-3BCPZ available?
The device is available in a 64-lead LFCSP (9mm x 9mm w/ EP).
- What are some typical applications of the AD9516-3BCPZ?
Typical applications include low jitter clock distribution, high-speed networking, forward error correction, clocking high-speed converters, high performance wireless transceivers, and ATE and high performance instrumentation.
- Does the AD9516-3BCPZ support automatic and manual output synchronization?
Yes, the device supports both automatic synchronization of all outputs on power-up and manual output synchronization.