Overview
The AD9516-1BCPZ, produced by Analog Devices Inc., is a 14-output clock generator that provides a multi-output clock distribution function with subpicosecond jitter performance. It features an on-chip phase-locked loop (PLL) and a voltage-controlled oscillator (VCO) that tunes from 2.30 GHz to 2.65 GHz. Optionally, an external VCO/VCXO up to 2.4 GHz can be used. This device is designed to maximize data converter performance by emphasizing low jitter and phase noise, making it suitable for various applications requiring high precision timing.
Key Specifications
| Parameter | Value | Unit | Comments |
|---|---|---|---|
| VCO Frequency Range | 2.30 GHz to 2.65 GHz | GHz | On-chip VCO |
| External VCO/VCXO Frequency Range | Up to 2.4 GHz | GHz | Optional |
| Reference Inputs | 1 differential or 2 single-ended | Accepts LVPECL, LVDS, or CMOS references to 250 MHz | |
| LVPECL Outputs | 6 pairs, up to 1.6 GHz | GHz | Each pair shares a 1-to-32 divider with coarse phase delay |
| LVDS Outputs | 4 pairs, up to 800 MHz | MHz | Each pair shares two cascaded 1-to-32 dividers with coarse phase delay |
| CMOS Outputs | Up to 250 MHz | MHz | Each LVDS output can be reconfigured as two CMOS outputs |
| Additive Output Jitter (LVPECL) | 225 fs rms | fs | |
| Additive Output Jitter (LVDS) | 275 fs rms | fs | |
| Channel-to-Channel Skew (Paired Outputs) | <10 ps | ps | |
| Operating Voltage | 3.3 V (nominal) | V | Single supply, with optional VCP to 5 V for external VCO |
| Operating Temperature Range | −40°C to +85°C | °C | Industrial range |
| Package Type | 64-lead LFCSP |
Key Features
- Low phase noise and subpicosecond jitter performance
- On-chip PLL and VCO tuning from 2.30 GHz to 2.65 GHz
- Optional external VCO/VCXO up to 2.4 GHz
- 1 differential or 2 single-ended reference inputs
- Reference monitoring capability
- Automatic revertive and manual reference switchover/holdover modes
- Accepts LVPECL, LVDS, or CMOS references to 250 MHz
- Programmable delays in path to PFD
- Digital or analog lock detect, selectable
- Six pairs of 1.6 GHz LVPECL outputs with 1-to-32 dividers and coarse phase delay
- Four pairs of 800 MHz LVDS clock outputs with two cascaded 1-to-32 dividers and coarse phase delay
- Each LVDS output can be reconfigured as two 250 MHz CMOS outputs
- Fine delay adjust (Δt) on each LVDS output
Applications
- Low jitter, low phase noise clock distribution
- 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
- Forward error correction (G.710)
- Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
- High performance wireless transceivers
- ATE and high performance instrumentation
Q & A
- What is the frequency range of the on-chip VCO in the AD9516-1?
The on-chip VCO tunes from 2.30 GHz to 2.65 GHz.
- Can the AD9516-1 use an external VCO/VCXO?
- What types of reference inputs does the AD9516-1 accept?
The AD9516-1 accepts 1 differential or 2 single-ended reference inputs and supports LVPECL, LVDS, or CMOS references up to 250 MHz.
- What is the operating voltage of the AD9516-1?
The AD9516-1 operates from a single 3.3 V supply, with optional VCP to 5 V for external VCO.
- What is the temperature range for the AD9516-1?
The AD9516-1 is specified for operation over the industrial range of −40°C to +85°C.
- How many output pairs does the AD9516-1 have for LVPECL and LVDS?
The AD9516-1 features six pairs of 1.6 GHz LVPECL outputs and four pairs of 800 MHz LVDS clock outputs.
- Can the LVDS outputs be reconfigured?
- What is the additive output jitter for LVPECL and LVDS outputs?
The additive output jitter is 225 fs rms for LVPECL outputs and 275 fs rms for LVDS outputs.
- What is the channel-to-channel skew for paired outputs?
The channel-to-channel skew for paired outputs is less than 10 ps.
- In what package is the AD9516-1 available?
The AD9516-1 is available in a 64-lead LFCSP package.
