Overview
The ADSP-21060CZ-160, produced by Analog Devices Inc., is a 32-bit signal processing microcomputer belonging to the SHARC (Super Harvard Architecture Computer) family. This processor is optimized for high-performance digital signal processing (DSP) applications. It features a 40 MHz SISD (Single Instruction, Single Data) SHARC core, achieving a peak performance of 120 MFLOPS. The ADSP-21060CZ-160 is fabricated in a high-speed, low-power CMOS process and supports IEEE-compatible 32-bit floating-point, 40-bit floating-point, and 32-bit fixed-point math operations.
Key Specifications
| Parameter | Value |
|---|---|
| Processor Core | 40 MHz SISD SHARC Core |
| Peak Performance | 120 MFLOPS |
| Instruction Cycle Time | 25 ns |
| Memory | 4 Mbits of on-chip dual-ported SRAM |
| Connectivity | Six Link Ports for point-to-point connectivity and array multiprocessing, Two synchronous serial ports with independent transmit and receive functions |
| DMA Controller | 10 Channel DMA controller |
| Host Interface | Host Processor Interface |
| Package | 240-Lead CQFP (Ceramic Quad Flat Pack) |
| Voltage | 5.25V |
| Current | 850mA |
Key Features
- Code compatible with all SHARC processors
- Supports IEEE-compatible 32-bit floating-point, 40-bit floating-point, and 32-bit fixed-point math
- Glueless connection for scalable DSP multiprocessing
- Integrated I/O peripherals supported by a dedicated I/O bus
- On-chip instruction cache allowing single-cycle instruction execution
- High-speed, low-power CMOS process
Applications
The ADSP-21060CZ-160 is designed for high-performance DSP applications, including but not limited to:
- Audio and video processing
- Medical imaging and diagnostics
- Radar and sonar systems
- Telecommunications and networking equipment
- Industrial control and automation systems
Q & A
- What is the clock speed of the ADSP-21060CZ-160?
The ADSP-21060CZ-160 operates at a clock speed of 40 MHz. - What is the peak performance of the ADSP-21060CZ-160?
The peak performance is 120 MFLOPS. - What type of memory does the ADSP-21060CZ-160 have?
The processor has 4 Mbits of on-chip dual-ported SRAM. - What connectivity options are available on the ADSP-21060CZ-160?
The processor features six Link Ports for point-to-point connectivity and array multiprocessing, as well as two synchronous serial ports with independent transmit and receive functions. - Does the ADSP-21060CZ-160 support floating-point operations?
Yes, it supports IEEE-compatible 32-bit floating-point, 40-bit floating-point, and 32-bit fixed-point math operations. - What is the package type of the ADSP-21060CZ-160?
The package type is a 240-Lead CQFP (Ceramic Quad Flat Pack). - What is the operating voltage of the ADSP-21060CZ-160?
The operating voltage is 5.25V. - Is the ADSP-21060CZ-160 code compatible with other SHARC processors?
Yes, it is code compatible with all SHARC processors. - What is the instruction cycle time of the ADSP-21060CZ-160?
The instruction cycle time is 25 ns. - Does the ADSP-21060CZ-160 have an on-chip instruction cache?
Yes, it has an on-chip instruction cache that allows every instruction to be executed in a single cycle.
