Overview
The ADSP-21060KBZ-160 is a high-performance, 32-bit floating-point digital signal processor (DSP) from Analog Devices Inc., part of the SHARC® (Super Harvard Architecture Computer) family. This processor is designed to offer high levels of DSP performance, making it suitable for demanding embedded applications. The ADSP-21060KBZ-160 builds on the ADSP-21000 DSP core, integrating a complete system-on-a-chip with dual-ported on-chip SRAM, integrated I/O peripherals, and a dedicated I/O bus. Fabricated in a high-speed, low-power CMOS process, it operates at 40 MHz with a 25 ns instruction cycle time and achieves 120 MFLOPS peak performance.
Key Specifications
| Specification | Value |
|---|---|
| Processor Type | 32-bit Floating-Point DSP |
| Clock Rate | 40 MHz |
| Instruction Cycle Time | 25 ns |
| Peak Performance | 120 MFLOPS |
| On-Chip SRAM | 4 Mbits (dual-ported) |
| Operating Voltage | 5 V (I/O and Core) |
| Operating Temperature | 0°C to 85°C |
| Package Type | 240-BFQFP Exposed Pad (Surface Mount) |
| Interfaces | Host Interface, Link Port, Serial Port |
| Serial Ports | Two 40 Mbps synchronous serial ports with independent transmit and receive functions |
| Link Ports | Six link ports for point-to-point connectivity and array multiprocessing |
| DMA Controller | 10 Channel DMA controller |
Key Features
- High Performance DSP Core: Optimized for high-performance DSP applications with 120 MFLOPS peak performance.
- Dual-Ported SRAM: 4 Mbits of on-chip SRAM, allowing for single-cycle, independent accesses by the core processor and I/O processor or DMA controller.
- Integrated I/O Peripherals: Includes host processor interface, serial ports, link ports, and parallel bus connectivity for glueless DSP multiprocessing.
- Flexible Memory Configuration: Memory can be configured for different combinations of code and data storage, supporting 16-bit, 32-bit, and 48-bit word sizes.
- Low Power CMOS Process: Fabricated in a high-speed, low-power CMOS process, ensuring efficient operation).
- Extensive Interface Options: Includes six link ports, two synchronous serial ports, and a host processor interface for flexible system integration).
Applications
- Embedded Systems: Suitable for high-performance embedded applications requiring advanced signal processing capabilities.
- Digital Signal Processing: Ideal for various DSP applications, including audio, image, and video processing).
- Industrial Automation: Used in industrial automation systems that require real-time signal processing and control).
- Telecommunications: Applied in telecommunications systems for signal processing and transmission).
Q & A
- What is the clock rate of the ADSP-21060KBZ-160?
The clock rate of the ADSP-21060KBZ-160 is 40 MHz).
- How much on-chip SRAM does the ADSP-21060KBZ-160 have?
The ADSP-21060KBZ-160 has 4 Mbits of dual-ported on-chip SRAM).
- What are the operating voltage and temperature ranges for the ADSP-21060KBZ-160?
The operating voltage is 5 V (I/O and Core), and the operating temperature range is 0°C to 85°C).
- What types of interfaces does the ADSP-21060KBZ-160 support?
The ADSP-21060KBZ-160 supports host interface, link ports, and serial ports).
- How many link ports does the ADSP-21060KBZ-160 have?
The ADSP-21060KBZ-160 has six link ports for point-to-point connectivity and array multiprocessing).
- What is the peak performance of the ADSP-21060KBZ-160?
The peak performance of the ADSP-21060KBZ-160 is 120 MFLOPS).
- Is the ADSP-21060KBZ-160 still in active production?
No, the ADSP-21060KBZ-160 is an obsolete product and is no longer in active production).
- What package type does the ADSP-21060KBZ-160 use?
The ADSP-21060KBZ-160 uses a 240-BFQFP exposed pad surface mount package).
- Does the ADSP-21060KBZ-160 support IEEE-compatible floating-point math?
Yes, the ADSP-21060KBZ-160 supports IEEE-compatible 32-bit and 40-bit floating-point math, as well as 32-bit fixed-point math).
- What is the instruction cycle time of the ADSP-21060KBZ-160?
The instruction cycle time of the ADSP-21060KBZ-160 is 25 ns).
