Overview
The ADSP-21062CSZ-160 is a high-performance digital signal processor (DSP) from Analog Devices Inc., part of the SHARC (Super Harvard Architecture Computer) family. This processor is designed to offer advanced capabilities and high levels of performance for signal processing applications. It builds on the ADSP-21000 DSP core, integrating a complete system-on-a-chip with dual-ported on-chip SRAM and various I/O peripherals supported by a dedicated I/O bus. Fabricated in a high-speed, low-power CMOS process, the ADSP-21062 operates at 40 MHz with a 25 ns instruction cycle time, enabling single-cycle execution of instructions due to its on-chip instruction cache.
Key Specifications
| Parameter | Value |
|---|---|
| Processor Core | 40 MHz SISD SHARC Core |
| Peak Performance | 120 MFLOPS |
| Instruction Cycle Time | 25 ns |
| Math Support | IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math |
| On-chip Memory | 2 Mbits of dual-ported SRAM |
| Host Processor Interface | Available |
| Link Ports | Six Link Ports for point-to-point connectivity and array multiprocessing |
| Synchronous Serial Ports | Two synchronous serial ports with independent transmit and receive functions |
| DMA Controller | 10 Channel DMA controller |
| Power Supply | 5V or 3.3V (depending on the variant) |
| Package Type | 240-BFQFP Exposed Pad |
Key Features
- High Performance DSP Core: The ADSP-21062 features a 40 MHz SHARC core, providing 120 MFLOPS peak performance.
- Dual-Ported SRAM: 2 Mbits of on-chip SRAM, allowing for single-cycle, independent accesses by the core processor and I/O processor or DMA controller.
- Integrated I/O Peripherals: Includes a host processor interface, DMA controller, two synchronous serial ports, and six link ports for glueless DSP multiprocessing.
- Mathematical Capabilities: Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math.
- Low Power CMOS Process: Fabricated in a high-speed, low-power CMOS process, ensuring efficient operation.
- Single-Cycle Execution: The on-chip instruction cache enables the processor to execute every instruction in a single cycle.
Applications
- Audio Processing: Suitable for high-quality audio processing, including audio codecs and effects.
- Image Processing: Used in various image processing applications such as image compression and enhancement.
- Industrial Control: Applied in industrial control systems for real-time signal processing and control.
- Medical Devices: Utilized in medical devices for signal processing in diagnostic equipment and medical imaging.
- Telecommunications: Employed in telecommunications for signal processing in modems, routers, and other communication equipment.
Q & A
- What is the clock speed of the ADSP-21062?
The ADSP-21062 operates at a clock speed of 40 MHz.
- What is the peak performance of the ADSP-21062?
The peak performance of the ADSP-21062 is 120 MFLOPS.
- How much on-chip SRAM does the ADSP-21062 have?
The ADSP-21062 has 2 Mbits of dual-ported on-chip SRAM.
- What types of mathematical operations does the ADSP-21062 support?
The ADSP-21062 supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math.
- Does the ADSP-21062 support glueless DSP multiprocessing?
- What is the instruction cycle time of the ADSP-21062?
The instruction cycle time of the ADSP-21062 is 25 ns.
- What types of serial ports are available on the ADSP-21062?
The ADSP-21062 has two synchronous serial ports with independent transmit and receive functions.
- How many channels does the DMA controller of the ADSP-21062 have?
The DMA controller of the ADSP-21062 has 10 channels.
- What is the package type of the ADSP-21062CSZ-160?
The package type of the ADSP-21062CSZ-160 is 240-BFQFP Exposed Pad.
- What are some common applications of the ADSP-21062?
The ADSP-21062 is commonly used in audio processing, image processing, industrial control, medical devices, and telecommunications.
