Overview
The ADSP-21060LKB-160, produced by Analog Devices Inc., is a member of the ADSP-2106x SHARC (Super Harvard Architecture Computer) family. This 32-bit signal processing microcomputer is designed to offer high levels of DSP performance and integration. Fabricated in a high-speed, low-power CMOS process, the ADSP-21060LKB-160 operates at 40 MHz with a 25 ns instruction cycle time, achieving 40 MIPS and 120 MFLOPS peak performance. It is code-compatible with all SHARC processors and supports IEEE-compatible 32-bit and 40-bit floating-point, as well as 32-bit fixed-point math.
Key Specifications
| Specification | Value |
|---|---|
| Processor Type | 32-bit SHARC DSP |
| Operating Frequency | 40 MHz |
| Instruction Cycle Time | 25 ns |
| Performance | 40 MIPS, 120 MFLOPS |
| On-chip Memory | 4 Mbits of dual-ported SRAM |
| Memory Configuration | Up to 128k words of 32-bit data, 256k words of 16-bit data, or 80k words of 48-bit instructions |
| Package Type | 225-Ball BGA |
| Voltage Supply | 3.3 V |
| I/O Peripherals | Six Link Ports, two synchronous serial ports, 10-channel DMA controller, host processor interface |
Key Features
- High-performance floating-point DSP core with integrated on-chip system features.
- Dual-ported on-chip SRAM allowing single-cycle, independent accesses by the core processor and I/O processor or DMA controller.
- Six Link Ports for point-to-point connectivity and array multiprocessing.
- Two synchronous serial ports with independent transmit and receive functions.
- 10-channel DMA controller for efficient data transfer.
- Host processor interface for seamless integration with other processors.
- Support for IEEE-compatible 32-bit and 40-bit floating-point, and 32-bit fixed-point math.
- Glueless connection for scalable DSP multiprocessing.
Applications
- High-performance signal processing in various fields such as telecommunications, medical imaging, and audio processing.
- DSP multiprocessing and array processing due to its link port and parallel bus connectivity.
- Embedded systems requiring advanced signal processing capabilities.
- Aerospace and defense applications where high reliability and performance are critical.
Q & A
- What is the operating frequency of the ADSP-21060LKB-160?
The ADSP-21060LKB-160 operates at 40 MHz.
- What is the instruction cycle time of the ADSP-21060LKB-160?
The instruction cycle time is 25 ns.
- How much on-chip memory does the ADSP-21060LKB-160 have?
The ADSP-21060LKB-160 has 4 Mbits of dual-ported SRAM.
- What types of math does the ADSP-21060LKB-160 support?
The ADSP-21060LKB-160 supports IEEE-compatible 32-bit and 40-bit floating-point, as well as 32-bit fixed-point math.
- What is the package type of the ADSP-21060LKB-160?
The package type is a 225-Ball BGA.
- What are the key I/O peripherals of the ADSP-21060LKB-160?
The key I/O peripherals include six Link Ports, two synchronous serial ports, a 10-channel DMA controller, and a host processor interface.
- What are some typical applications of the ADSP-21060LKB-160?
Typical applications include high-performance signal processing in telecommunications, medical imaging, audio processing, and embedded systems.
- How does the ADSP-21060LKB-160 support DSP multiprocessing?
The ADSP-21060LKB-160 supports DSP multiprocessing through its link port and parallel bus connectivity, enabling glueless connection for scalable DSP multiprocessing.
- What is the voltage supply for the ADSP-21060LKB-160?
The voltage supply is 3.3 V.
- Does the ADSP-21060LKB-160 have an on-chip instruction cache?
Yes, the ADSP-21060LKB-160 has an on-chip instruction cache that allows every instruction to be executed in a single cycle.
