Overview
The SPC560P50L3B1ABY is a 32-bit system-on-chip (SoC) automotive microcontroller from STMicroelectronics. It is part of the SPC560 series, designed to address various automotive applications, particularly in chassis and safety systems such as electrical hydraulic power steering (EHPS), electric power steering (EPS), and airbag systems. This microcontroller is built on the e200z0h CPU core complex, operating at a frequency of up to 64 MHz and compliant with the Power Architecture embedded category.
Key Specifications
Parameter | Specification |
---|---|
CPU Core | 64 MHz, single issue, 32-bit e200z0h |
Memory | Up to 512 KB on-chip code flash memory with ECC, 64 KB on-chip data flash memory with ECC, up to 40 KB on-chip SRAM with ECC |
Timers | 6 timers with up/down count capabilities, 16-bit resolution, cascadable counters, quadrature decode with rotation direction flag |
Communications Interfaces | 2 LINFlex channels (LIN 2.1), 4 DSPI channels, 1 FlexCAN interface (2.0B Active), 1 safety port based on FlexCAN, 1 FlexRay module (V2.1) |
Analog-to-Digital Converters (ADC) | Two 10-bit ADCs with 2 × 11 input channels + 4 shared channels, conversion time < 1 μs including sampling time at full precision |
Operating Temperature | -40°C to 125°C |
Package | LQFP 100 14x14x1.4 mm |
RoHS Compliance | Ecopack2 |
Key Features
- Compliant with Power Architecture embedded category and Variable Length Encoding (VLE)
- Programmable watchdog timer, non-maskable interrupt, and fault collection unit
- Nexus L2+ interface and 16-channel eDMA controller with 16 priority levels
- General purpose I/Os individually programmable as input, output or special function
- Double buffer input capture and output compare, and ADC synchronization signals
- On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM)
- FlexPWM unit with 8 complementary or independent outputs
Applications
The SPC560P50L3B1ABY is specifically designed for automotive chassis and safety applications, including:
- Electrical Hydraulic Power Steering (EHPS)
- Electric Power Steering (EPS)
- Airbag systems
Q & A
- What is the CPU core of the SPC560P50L3B1ABY? The CPU core is a 64 MHz, single issue, 32-bit e200z0h.
- What is the memory configuration of the SPC560P50L3B1ABY? It includes up to 512 KB on-chip code flash memory, 64 KB on-chip data flash memory, and up to 40 KB on-chip SRAM, all with ECC.
- What communication interfaces are available on the SPC560P50L3B1ABY? It features 2 LINFlex channels, 4 DSPI channels, 1 FlexCAN interface, 1 safety port based on FlexCAN, and 1 FlexRay module.
- What are the key features of the timers in the SPC560P50L3B1ABY? The timers have up/down count capabilities, 16-bit resolution, are cascadable, and include quadrature decode with rotation direction flag.
- What is the operating temperature range of the SPC560P50L3B1ABY? The operating temperature range is -40°C to 125°C.
- Is the SPC560P50L3B1ABY RoHS compliant? Yes, it is RoHS compliant with an Ecopack2 rating.
- What package type is the SPC560P50L3B1ABY available in? It is available in an LQFP 100 14x14x1.4 mm package.
- What are the primary applications of the SPC560P50L3B1ABY? The primary applications include EHPS, EPS, and airbag systems.
- Does the SPC560P50L3B1ABY have analog-to-digital converters? Yes, it features two 10-bit ADCs with multiple input channels.
- What is the purpose of the FlexPWM unit in the SPC560P50L3B1ABY? The FlexPWM unit provides 8 complementary or independent outputs with ADC synchronization signals.