Overview
The PCA9517ADMR2G, produced by onsemi, is a level-translating I2C-bus repeater designed to facilitate communication between I2C-bus or SMBus systems operating at different voltage levels. This device supports voltage level translation from as low as 0.9 V to as high as 5.5 V, making it versatile for various applications. It retains all the operating modes and features of the I2C-bus system during level shifts and provides bidirectional buffering for both the data (SDA) and clock (SCL) lines, enabling the extension of the I2C-bus and isolation of bus segments for better system performance.
Key Specifications
| Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| VCC(A) and VCC(B) | Operating Voltage Range | 2.7 | - | 5.5 | V |
| VCC(A) | Minimum Operating Voltage | 0.9 | - | - | V |
| ICC(A) | Supply Current (Port A) | - | 1 | 5 | mA |
| ICC(A)c | Contention Port A Supply Current | - | 1.5 | 5 | mA |
| VIH | High-Level Input Voltage | - | 0.7 x VCC(B) | - | V |
| VIL | Low-Level Input Voltage | - | 0.4 x VCC(B) | - | V |
| TA | Operating Free-Air Temperature | -40 | - | 85 | °C |
Key Features
- Provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) for I2C-bus or SMBus applications.
- 2-channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device.
- All inputs and I/Os are overvoltage tolerant to 5.5 V even when the device is unpowered.
- Power-up circuit keeps the output drivers turned off until VCC(B) is above 2.5 V and VCC(A) is above 0.8 V.
- Supports star and series configurations for multiple PCA9517A devices.
- Enables extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and clock (SCL) lines.
Applications
- I2C-bus or SMBus systems requiring voltage level translation.
- Extension of I2C-bus segments to increase the number of devices on the bus.
- Isolation of bus segments for improved system performance and noise reduction.
- Star and series configurations for complex I2C-bus networks.
- Embedded systems, industrial control systems, and consumer electronics where I2C-bus communication is necessary across different voltage domains.
Q & A
- What is the primary function of the PCA9517ADMR2G?
The PCA9517ADMR2G is a level-translating I2C-bus repeater that provides voltage level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) for I2C-bus or SMBus applications.
- What is the operating voltage range for the PCA9517ADMR2G?
The operating voltage range for VCC(A) and VCC(B) is from 2.7 V to 5.5 V, with VCC(A) supporting as low as 0.9 V.
- How does the PCA9517ADMR2G handle overvoltage conditions?
All inputs and I/Os are overvoltage tolerant to 5.5 V even when the device is unpowered.
- What is the significance of the power-up circuit in the PCA9517ADMR2G?
The power-up circuit keeps the output drivers turned off until VCC(B) is above 2.5 V and VCC(A) is above 0.8 V.
- Can multiple PCA9517ADMR2G devices be connected in series or star configurations?
Yes, multiple PCA9517ADMR2G devices can be connected in both series and star configurations to support complex I2C-bus networks.
- What is the maximum capacitance allowed on either side of the PCA9517ADMR2G?
The device allows up to 400 pF on either side of the repeater.
- How does the PCA9517ADMR2G handle arbitration or clock stretching events?
Arbitration or clock stretching events require that the LOW level on the B bus side at the input of the PCA9517ADMR2G be at or below 0.4 V to be recognized and transmitted to the A bus side.
- What are the typical applications of the PCA9517ADMR2G?
The PCA9517ADMR2G is used in I2C-bus or SMBus systems, embedded systems, industrial control systems, and consumer electronics where voltage level translation is necessary.
- What is the operating temperature range for the PCA9517ADMR2G?
The operating free-air temperature range is from -40°C to 85°C.
- How does the PCA9517ADMR2G support the extension of the I2C-bus?
The device provides bidirectional buffering for both the data (SDA) and clock (SCL) lines, enabling the extension of the I2C-bus and isolation of bus segments.
