Overview
The MC100LVEL29DWR2G is a dual master-slave flip-flop produced by onsemi. This device features fully differential Data and Clock inputs as well as outputs, making it pin and functionally equivalent to the MC100EL29. Data enters the master latch when the clock is LOW and transfers to the slave upon a positive transition on the clock input. The differential inputs have special circuitry to ensure device stability under open input conditions, and both flip flops include asynchronous, overriding Set and Reset inputs.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Flip-Flop Toggle Frequency | 1100 MHz | |
| ESD Protection | > 2 kV HBM | |
| Typical Propagation Delays | 580 ps | |
| Operating Temperature Range | -40°C to 85°C | |
| PECL Mode Operating Range | VCC = 3.0 V to 3.8 V, VEE = 0 V | |
| NECL Mode Operating Range | VCC = 0 V, VEE = -3.0 V to -3.8 V | |
| Internal Input Pulldown Resistors | Present | |
| Package Type | 20-SOIC (0.295", 7.50mm Width) | |
| Mounting Type | Surface Mount | |
| Transistor Count | 313 devices | |
| Flammability Rating | UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34 |
Key Features
- Fully differential Data and Clock inputs as well as outputs
- Asynchronous, overriding Set and Reset inputs
- Internally generated voltage supply (VBB) for single-ended input conditions and AC coupled inputs
- Temperature compensation
- Internal input pulldown resistors
- Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Pb-Free, Halogen Free, and RoHS Compliant
Applications
- Bounce elimination switch
- Data storage
- Data transfer
- Latch
- Registers
- Memory
- Frequency division
- Event Detectors
- Data Synchronizers
Q & A
- What is the MC100LVEL29DWR2G?
The MC100LVEL29DWR2G is a dual master-slave flip-flop with fully differential Data and Clock inputs and outputs, produced by onsemi.
- What is the operating temperature range of the MC100LVEL29DWR2G?
The operating temperature range is -40°C to 85°C.
- What are the typical propagation delays of the MC100LVEL29DWR2G?
The typical propagation delays are 580 ps.
- Does the MC100LVEL29DWR2G have ESD protection?
- What are the PECL and NECL mode operating ranges for the MC100LVEL29DWR2G?
PECL mode: VCC = 3.0 V to 3.8 V with VEE = 0 V. NECL mode: VCC = 0 V with VEE = -3.0 V to -3.8 V.
- What is the purpose of the VBB pin in the MC100LVEL29DWR2G?
The VBB pin is an internally generated voltage supply used as a switching reference voltage for single-ended input conditions and to rebias AC coupled inputs.
- Is the MC100LVEL29DWR2G Pb-Free and RoHS Compliant?
- What are some common applications of the MC100LVEL29DWR2G?
Common applications include bounce elimination switch, data storage, data transfer, latch, registers, memory, frequency division, event detectors, and data synchronizers.
- What is the package type of the MC100LVEL29DWR2G?
The package type is 20-SOIC (0.295", 7.50mm Width).
- Does the MC100LVEL29DWR2G meet any specific JEDEC specifications?
