Overview
The MC100EP91DWG, produced by onsemi, is a triple any level positive input to NECL (Negative ECL) output translator. This device is designed to accept a variety of input signal levels including LVPECL, LVTTL, LVCMOS, HSTL, CML, or LVDS, and translate them into differential NECL output signals. The MC100EP91 requires three power rails: positive (VCC), negative (VEE), and ground (GND), making it versatile for various high-speed applications. The device is available in both SOIC-20 and QFN-24 packages and is Pb-Free, Halogen Free, and RoHS compliant.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Maximum Input Clock Frequency | > 2.0 GHz | |
| Maximum Input Data Rate | > 2.0 Gb/s | |
| Propagation Delay | 500 ps (Typical) | ps |
| Operating Range (VCC) | 2.375 V to 3.8 V | V |
| Operating Range (VEE) | −3.0 V to −5.5 V | V |
| Operating Temperature Range | −40 to +85 °C | °C |
| Storage Temperature Range | −65 to +150 °C | °C |
| Output HIGH Voltage (NECL) | −1145 to −895 mV | mV |
| Output LOW Voltage (NECL) | −1945 to −1600 mV | mV |
Key Features
- Accepts LVPECL, LVTTL, LVCMOS, HSTL, CML, or LVDS input signals.
- Translates input signals to differential NECL output signals.
- Requires three power rails: VCC, VEE, and GND.
- Internally generated VBB reference voltage available for single-ended inputs and AC coupled inputs.
- ESD protection: Human Body Model > 2 kV, Machine Model > 150 V, Charged Device Model > 2 kV.
- Pb-Free, Halogen Free, and RoHS compliant.
- Available in SOIC-20 and QFN-24 packages.
Applications
The MC100EP91DWG is suitable for various high-speed applications requiring level translation between different logic families. These include:
- High-speed data transmission systems.
- Telecommunication equipment.
- Data centers and cloud infrastructure.
- High-performance computing systems.
- Networking equipment.
Q & A
- What types of input signals can the MC100EP91DWG accept?
The MC100EP91DWG can accept LVPECL, LVTTL, LVCMOS, HSTL, CML, or LVDS input signals.
- What is the maximum input clock frequency of the MC100EP91DWG?
The maximum input clock frequency is greater than 2.0 GHz.
- What is the propagation delay of the MC100EP91DWG?
The propagation delay is typically 500 ps.
- What are the operating voltage ranges for VCC and VEE?
VCC operates from 2.375 V to 3.8 V, and VEE operates from −3.0 V to −5.5 V.
- Is the MC100EP91DWG RoHS compliant?
- What are the package options for the MC100EP91DWG?
The device is available in SOIC-20 and QFN-24 packages.
- How should the VBB pin be used?
The VBB pin is an internally generated reference voltage and can be used for single-ended inputs and AC coupled inputs. It should be decoupled with a 0.01 μF capacitor and limited to 0.5 mA current sourcing or sinking.
- What is the thermal resistance of the MC100EP91DWG in different packages?
The thermal resistance (junction-to-ambient) for the SOIC-20 package is 90 °C/W at 0 lfpm and 60 °C/W at 500 lfpm. For the QFN-24 package, it is 37 °C/W at 0 lfpm and 32 °C/W at 500 lfpm.
- What is the storage temperature range for the MC100EP91DWG?
The storage temperature range is −65 to +150 °C.
- How should the exposed pad on the QFN package be handled?
The exposed pad on the QFN package must be attached to a heat-sinking conduit and may only be electrically connected to VEE (not GND).
