Overview
The ADP3120AJCPZ-RL, produced by onsemi, is a dual, high-voltage MOSFET driver optimized for driving two N-channel MOSFETs in a non-isolated synchronous buck converter topology. This driver is designed to enhance the efficiency and performance of high-current multi-phase buck regulators, particularly those converting a 12 V rail directly to the core voltage required by complex logic chips.
Key Specifications
| Characteristic | Symbol | Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Supply Voltage Range | VCC | 4.6 | 13.2 | V | ||
| Supply Current | ISYS | BST = 12 V, IN = 0 V | 0.7 | 2.0 | mA | |
| Input Voltage High | VOD_HI | 2.0 | V | |||
| Input Voltage Low | VOD_LO | 0.8 | V | |||
| Propagation Delay High to Low | tpdl | 25 | ns | |||
| Propagation Delay Low to High | tpdh | 45 | ns | |||
| Transition Time | 25 | ns | ||||
| Operating Ambient Temperature | TA | -20 | 85 | °C | ||
| Operating Junction Temperature | TJ | -20 | 150 | °C |
Key Features
- Dual, high-voltage MOSFET driver for driving two N-channel MOSFETs in a synchronous buck converter.
- Optimized for high-current multi-phase buck regulators converting 12 V rail to core voltage for complex logic chips.
- Internal adaptive nonoverlap circuitry to reduce switching losses by preventing simultaneous conduction of both MOSFETs.
- Floating top driver design accommodates VBST voltages, ensuring efficient high-side MOSFET gate drive.
- Capable of driving a 3000 pF load with a 45 ns propagation delay and a 25 ns transition time.
- Single PWM input signal required for proper operation of both high-side and low-side MOSFETs.
- Output disable feature to force DRVH and DRVL low when needed.
- Bootstrap circuit with external diode and capacitor for high-side driver gate voltage development.
Applications
- High-current multi-phase buck regulators.
- Power supply units (PSUs) for servers, data centers, and other high-power applications.
- Point-of-load (POL) converters in complex electronic systems.
- DC-DC converters in telecommunications and industrial equipment.
- High-efficiency power conversion systems requiring synchronous buck topology.
Q & A
- What is the primary function of the ADP3120AJCPZ-RL?
The ADP3120AJCPZ-RL is a dual MOSFET driver designed to drive the gates of both high-side and low-side power MOSFETs in a synchronous buck converter.
- What is the operating voltage range of the ADP3120AJCPZ-RL?
The operating voltage range is from 4.6 V to 13.2 V.
- What is the propagation delay of the ADP3120AJCPZ-RL?
The propagation delay is 45 ns for high to low and 25 ns for low to high.
- How does the ADP3120AJCPZ-RL reduce switching losses?
The internal adaptive nonoverlap circuitry prevents simultaneous conduction of both MOSFETs, reducing switching losses.
- What is the purpose of the bootstrap circuit in the ADP3120AJCPZ-RL?
The bootstrap circuit, comprising an external diode and capacitor, develops the gate voltage for the high-side MOSFET.
- What are the typical applications of the ADP3120AJCPZ-RL?
Typical applications include high-current multi-phase buck regulators, PSUs, POL converters, and DC-DC converters in various high-power systems.
- What is the maximum operating junction temperature of the ADP3120AJCPZ-RL?
The maximum operating junction temperature is 150°C.
- How does the output disable feature work on the ADP3120AJCPZ-RL?
The output disable feature forces DRVH and DRVL low when the OD pin is set low, disabling normal operation.
- What is the recommended capacitor value for the bootstrap circuit?
The recommended capacitor value for the bootstrap circuit is between 100 nF and 1.0 μF.
- What is the package type of the ADP3120AJCPZ-RL?
The package types available include SO-8 and DFN-8.
