Overview
The UC3825AN is a high-performance, BiCMOS version of the popular UC3825 PWM (Pulse Width Modulation) controller from Texas Instruments. It is designed for use in applications requiring high-speed PWM control and high voltage operation. This controller offers improved performance and reliability, making it suitable for a wide range of power management and control applications, including power supplies, motor control, and voltage regulation.
Key Specifications
Parameter | Value | Unit |
---|---|---|
Supply Voltage (VCC) | 22 | V |
Output Current (DC), OUTA, OUTB | 0.5 | A |
Output Current (Pulse), OUTA, OUTB | 2.2 | A |
Maximum Duty Cycle | 50% | % |
Switching Frequency (Max) | 1000 | kHz |
UVLO Thresholds On/Off | 9.2/8.4 | V |
Operating Temperature Range | 0 to 70 | °C |
Gate Drive (Typical) | 2 | A |
Leading Edge Blanking Time | 300-450 | ns |
Startup Supply Current | 100 | μA |
Key Features
- Compatible with voltage-mode or current-mode control methods
- Practical operation at switching frequencies up to 1 MHz
- 50-ns propagation delay to output
- High-current dual totem pole outputs (2-A peak)
- Trimmed oscillator discharge current for accurate dead time control
- Low 100-μA startup current, ideal for off-line applications
- Pulse-by-pulse current limiting comparator and latched overcurrent comparator with full cycle restart
- Adjustable switching frequency, current limiting, dead time control, error amplifier, leading edge blanking, and soft start
- Synchronization pin for external clock synchronization
Applications
The UC3825AN is versatile and can be used in various power management and control applications, including:
- Switch mode power supplies (SMPS)
- Motor control systems
- Voltage regulation applications
- High voltage systems requiring precise PWM control
Q & A
- Q: What is the maximum switching frequency of the UC3825AN?
A: The UC3825AN can operate at switching frequencies up to 1 MHz.
- Q: What are the UVLO thresholds for the UC3825AN?
A: The UVLO thresholds are 9.2 V and 8.4 V for the A and B versions, respectively.
- Q: What is the typical gate drive current of the UC3825AN?
A: The typical gate drive current is 2 A.
- Q: Is the UC3825AN suitable for high voltage applications?
A: Yes, it is designed for high voltage operation.
- Q: What is the purpose of the leading edge blanking feature in the UC3825AN?
A: Leading edge blanking helps reject noise inherent with switched mode power conversion by ignoring the PWM comparator for a fixed time after the start of the pulse.
- Q: How does the soft-start feature work in the UC3825AN?
A: The soft-start is programmed by a capacitor on the SS pin. At power up, the SS pin is discharged, and the error amplifier output follows as the internal 9-μA source charges the SS pin until closed loop regulation takes over.
- Q: What happens during an overcurrent fault in the UC3825AN?
A: When an overcurrent fault occurs, the fault latch is set, and the output pins are driven low. The soft-start capacitor is then discharged by a 250-μA current sink before allowing a restart.
- Q: What is the significance of the CLK/LEB pin in the UC3825AN?
A: The CLK/LEB pin combines the functions of clock output and leading edge blanking adjustment, and it is buffered for easier interfacing.
- Q: What are the key improvements in the UC3825AN compared to its predecessors?
A: The UC3825AN features improved versions of the UC3823/UC3825 PWMs, including enhanced oscillator discharge current, lower startup current, and improved overcurrent protection.
- Q: What is the recommended layout practice for the UC3825AN to ensure correct operation?
A: A ground plane must be employed, with a unique section designated for high di/dt currents associated with the output stages. VCC should be bypassed directly to power ground with a good high frequency capacitor.