Overview
The Texas Instruments (TI) TMS320C206 and TMS320LC206 digital signal processors (DSPs) are part of the TMS320C20x series, fabricated with high-performance static CMOS integrated-circuit technology. These DSPs are optimized for low-power operation and feature an advanced Harvard architecture, on-chip peripherals, and on-chip memory. The TMS320C206PZ80, specifically, is a variant of the TMS320C206 with a 100-pin PZ (TQFP) package.
The architectural design of the TMS320C206 is enhanced for increased performance and versatility, making it compatible with other devices in the ’C20x/’C2000 platform, such as the TMS320C203/LC203 and TMS320F206. The source code for these DSPs is software-compatible with the ’C1x and ’C2x DSPs and is upwardly code-compatible with TMS320C5x devices.
Key Specifications
| Specification | TMS320C206 | TMS320LC206 |
|---|---|---|
| Instruction-Cycle Time | 25 ns at 3.3 V | 25 ns at 3.3 V |
| On-Chip Memory | 544 × 16 Words of On-Chip Dual-Access Data RAM, 32K × 16 Words of On-Chip ROM, 4K × 16 Words of On-Chip Single-Access Program/Data RAM | 544 × 16 Words of On-Chip Dual-Access Data RAM, 32K × 16 Words of On-Chip ROM, 4K × 16 Words of On-Chip Single-Access Program/Data RAM |
| External Memory Space | 224K × 16-Bit Maximum Addressable External Memory Space (64K Program, 64K Data, 64K I/O, 32K Global) | 224K × 16-Bit Maximum Addressable External Memory Space (64K Program, 64K Data, 64K I/O, 32K Global) |
| Arithmetic Logic Unit (ALU) | 32-Bit Arithmetic Logic Unit (ALU) Accumulator | 32-Bit Arithmetic Logic Unit (ALU) Accumulator |
| Multiplier | 16 × 16-Bit Multiplier With a 32-Bit Product | 16 × 16-Bit Multiplier With a 32-Bit Product |
| Peripherals | On-Chip 20-Bit Timer, On-Chip Software-Programmable Wait-State Generator, On-Chip Oscillator, On-Chip Phase-Locked Loop (PLL), Six General-Purpose I/O Pins, Full-Duplex Asynchronous Serial Port (UART), Enhanced Synchronous Serial Port (ESSP) With Four-Level-Deep FIFOs | On-Chip 20-Bit Timer, On-Chip Software-Programmable Wait-State Generator, On-Chip Oscillator, On-Chip Phase-Locked Loop (PLL), Six General-Purpose I/O Pins, Full-Duplex Asynchronous Serial Port (UART), Enhanced Synchronous Serial Port (ESSP) With Four-Level-Deep FIFOs |
| Power Supply | 5-V I/O (3.3-V core) | 3.3-V core and I/O |
| Package Type | 100-pin PZ (TQFP) | 100-pin PZ (TQFP) |
Key Features
- Enhanced TMS320 architectural design for increased performance and versatility.
- Advanced integrated-circuit processing technology for increased performance.
- Pin- and code-compatible with ’C203 and ’F206 devices.
- Source code compatibility with ’C1x and ’C2x DSPs and upward code-compatibility with TMS320C5x devices.
- Four external interrupts.
- On-chip peripherals including a 20-bit timer, software-programmable wait-state generator, oscillator, and phase-locked loop (PLL).
- Six general-purpose I/O pins, full-duplex asynchronous serial port (UART), and enhanced synchronous serial port (ESSP) with four-level-deep FIFOs.
- Input clock options with multiply-by-one, -two, or -four, and divide-by-two.
- Power down IDLE mode and IEEE 1149.1-compatible scan-based emulation.
Applications
The TMS320C206 and TMS320LC206 DSPs are versatile and can be applied in various fields requiring high-performance digital signal processing. These include:
- Audio and video processing systems.
- Telecommunications and wireless communication systems.
- Industrial control and automation systems.
- Medical imaging and diagnostic equipment.
- Aerospace and defense systems.
- Automotive systems, including infotainment and safety systems.
Q & A
- What is the instruction-cycle time of the TMS320C206 DSP?
The instruction-cycle time of the TMS320C206 DSP is 25 ns at 3.3 V.
- What is the on-chip memory configuration of the TMS320C206?
The TMS320C206 has 544 × 16 words of on-chip dual-access data RAM, 32K × 16 words of on-chip ROM, and 4K × 16 words of on-chip single-access program/data RAM.
- What are the external memory space capabilities of the TMS320C206?
The TMS320C206 has a maximum addressable external memory space of 224K × 16 bits, divided into 64K program, 64K data, 64K I/O, and 32K global memory.
- What peripherals are integrated into the TMS320C206?
The TMS320C206 includes on-chip peripherals such as a 20-bit timer, software-programmable wait-state generator, oscillator, phase-locked loop (PLL), six general-purpose I/O pins, full-duplex asynchronous serial port (UART), and enhanced synchronous serial port (ESSP) with four-level-deep FIFOs.
- What is the power supply configuration for the TMS320C206 and TMS320LC206?
The TMS320C206 has a 5-V I/O supply with a 3.3-V core, while the TMS320LC206 has a 3.3-V core and I/O supply.
- What package type is used for the TMS320C206PZ80?
The TMS320C206PZ80 is packaged in a 100-pin PZ (TQFP) package.
- Is the TMS320C206 compatible with other DSPs in the ’C20x series?
- What are the input clock options for the TMS320C206?
The TMS320C206 offers input clock options with multiply-by-one, -two, or -four, and divide-by-two.
- Does the TMS320C206 support power-saving modes?
- Is the TMS320C206 compatible with IEEE 1149.1 scan-based emulation?
