Overview
The TMS320C6711DZDP200 is a high-performance floating-point Digital Signal Processor (DSP) from Texas Instruments, part of the TMS320C6000 DSP platform. This device is based on the advanced Very Long Instruction Word (VLIW) architecture, making it an excellent choice for multichannel and multifunction applications. The C6711D offers operational flexibility similar to high-speed controllers and numerical capabilities akin to array processors. It supports clock rates of 167, 200, and 250 MHz, achieving up to 1200 and 1500 million floating-point operations per second (MFLOPS) at 200 and 250 MHz, respectively. The device is packaged in a 272-pin Ball Grid Array (BGA) and is manufactured using 0.13-µm CMOS technology with a 6-level copper metal process.
Key Specifications
| Specification | Details |
|---|---|
| Clock Rates | 167, 200, 250 MHz |
| Instruction Cycle Time | 6, 5, 4 ns |
| MFLOPS | 1000, 1200, 1500 |
| Functional Units | Eight highly independent functional units: four floating-/fixed-point ALUs, two fixed-point ALUs, two floating-/fixed-point multipliers |
| General-Purpose Registers | 32 registers of 32-bit word length |
| Cache Architecture | L1P: 32-Kbit direct mapped cache, L1D: 32-Kbit 2-way set-associative cache, L2: 512-Kbit shared memory/cache |
| External Memory Interface | Glueless interface to SDRAM, SBSRAM, and asynchronous peripherals |
| Package Type | 272-pin Ball Grid Array (BGA) |
| Operating Temperature Range | 0 to 90°C |
| Voltage | 3.3-V I/O, 1.4-V or 1.20-V internal |
| Process Technology | 0.13-µm CMOS with 6-level copper metal process |
Key Features
- Advanced VLIW Architecture: Supports eight 32-bit instructions per cycle.
- High-Performance: Achieves up to 1500 MFLOPS at 250 MHz.
- Instruction Set Features: Hardware support for IEEE single-precision and double-precision instructions, instruction packing, and all instructions are conditional.
- Peripherals: Includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF).
- Memory Architecture: L1 and L2 cache-based architecture with flexible configuration options.
- Development Tools: New C compiler, assembly optimizer, and Windows debugger interface.
- GPIO and Timers: Dedicated general-purpose input/output (GPIO) module with 5 pins and two 32-bit general-purpose timers.
- Clock Generator: Flexible software configurable PLL-based clock generator module.
- Boundary Scan: IEEE-1149.1 (JTAG) boundary-scan-compatible.
Applications
The TMS320C6711DZDP200 is suitable for a wide range of applications that require high-performance digital signal processing, including:
- Multichannel and Multifunction Systems: Ideal for systems that need to handle multiple data streams and complex signal processing tasks.
- Telecommunications: Supports direct interface to T1/E1, MVIP, SCSA framers, and is AC97-compatible.
- Audio and Video Processing: Can be used in various audio and video processing applications due to its high MFLOPS performance.
- Industrial Control Systems: Suitable for high-speed control and monitoring applications.
- Medical Imaging and Diagnostics: Can be used in medical devices that require advanced signal processing capabilities.
Q & A
- What is the maximum clock rate of the TMS320C6711DZDP200?
The maximum clock rate is 250 MHz.
- What is the MFLOPS performance at 250 MHz?
Up to 1500 MFLOPS.
- How many functional units does the C6711D have?
Eight highly independent functional units.
- What type of cache architecture does the C6711D use?
A two-level cache-based architecture with L1P, L1D, and L2 caches.
- What is the package type of the TMS320C6711DZDP200?
272-pin Ball Grid Array (BGA).
- What is the operating temperature range of the C6711D?
0 to 90°C.
- Does the C6711D support IEEE floating-point instructions?
- What peripherals are included in the C6711D?
Two McBSPs, two general-purpose timers, HPI, and a glueless EMIF.
- Is the C6711D JTAG-compatible?
- What development tools are available for the C6711D?
A new C compiler, assembly optimizer, and Windows debugger interface.
