Overview
The SPC560P50L3CEFAR is a 32-bit system-on-chip (SoC) automotive microcontroller from STMicroelectronics. It is part of a family of automotive-focused products designed to address chassis applications, such as electrical hydraulic power steering (EHPS) and electric power steering (EPS), as well as airbag applications. This microcontroller is built on the Power Architecture® embedded category and features a 64 MHz, single-issue, 32-bit CPU core complex (e200z0h) with Variable Length Encoding (VLE).
Key Specifications
| Parameter | Specification |
|---|---|
| CPU Clock Frequency | 64 MHz |
| CPU Core | 32-bit, single issue, e200z0h |
| Code Flash Memory | Up to 512 KB with ECC and erase/program controller |
| Data Flash Memory | 64 KB (4 × 16 KB) with ECC for EEPROM emulation |
| SRAM | Up to 40 KB with ECC |
| Package | LQFP 100 14x14x1.4 mm |
| Operating Temperature | -40°C to 125°C |
| ADC Resolution | 10-bit, 2 × 11 input channels + 4 shared channels |
| Communication Interfaces | 2 LINFlex channels, 4 DSPI channels, 1 FlexCAN interface, 1 FlexRay module (V2.1) |
Key Features
- Fail safe protection with programmable watchdog timer, non-maskable interrupt, and fault collection unit
- Nexus L2+ interface and interrupts with 16-channel eDMA controller and 16 priority level controller
- General purpose I/Os individually programmable as input, output or special function
- 2 general purpose eTimer units with 6 timers each, up/down count capabilities, and quadrature decode
- Double buffer input capture and output compare
- On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM)
- FlexPWM unit with 8 complementary or independent outputs and ADC synchronization signals
- Programmable ADC Cross Triggering Unit (CTU) and 4 analog watchdogs with interrupt capability
Applications
The SPC560P50L3CEFAR is designed for various automotive applications, including:
- Electrical Hydraulic Power Steering (EHPS)
- Electric Power Steering (EPS)
- Airbag systems
- Other automotive chassis and safety applications
Q & A
- What is the CPU clock frequency of the SPC560P50L3CEFAR?
The CPU clock frequency is 64 MHz.
- What type of CPU core does the SPC560P50L3CEFAR use?
The CPU core is a 32-bit, single-issue e200z0h.
- How much code flash memory does the SPC560P50L3CEFAR have?
It has up to 512 KB of code flash memory with ECC and erase/program controller.
- What is the resolution of the analog-to-digital converters (ADCs)?
The ADCs have a 10-bit resolution with 2 × 11 input channels + 4 shared channels.
- What communication interfaces are available on the SPC560P50L3CEFAR?
The microcontroller features 2 LINFlex channels, 4 DSPI channels, 1 FlexCAN interface, and 1 FlexRay module (V2.1).
- What is the operating temperature range of the SPC560P50L3CEFAR?
The operating temperature range is -40°C to 125°C.
- Does the SPC560P50L3CEFAR have fail-safe protection features?
Yes, it includes fail-safe protection with a programmable watchdog timer, non-maskable interrupt, and fault collection unit.
- What is the purpose of the Nexus L2+ interface?
The Nexus L2+ interface is used for debugging and development purposes.
- Can the general purpose I/Os be programmed?
Yes, the general purpose I/Os can be individually programmed as input, output, or special function.
- What is the FlexPWM unit used for?
The FlexPWM unit provides 8 complementary or independent outputs with ADC synchronization signals.
