Overview
The MC100LVEP111FA is a low skew 2:1:10 differential driver designed by onsemi, specifically tailored for high-performance clock distribution applications. This device is part of the 100 Series and is pin and functionally compatible with the MC100EP111. It accepts two clock sources into an input multiplexer and supports both differential and single-ended PECL input signals, as well as HSTL inputs when operating in PECL mode. The device is optimized for low output-to-output skew, ensuring precise clock distribution across backplanes or boards.
Key Specifications
| Symbol | Parameter | Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| VCC | Power Supply (PECL Mode) | VEE = 0 V | 2.375 | - | 3.8 | V |
| VEE | Power Supply (NECL Mode) | VCC = 0 V | -3.8 | - | -2.375 | V |
| VI | Input Voltage (PECL Mode) | VEE = 0 V, VI not more positive than VCC | -6.0 | - | 6.0 | VDC |
| VI | Input Voltage (NECL Mode) | VCC = 0 V, VI not more negative than VEE | -6.0 | - | 6.0 | VDC |
| Iout | Output Current | Continuous | - | - | 50 | mA |
| IBB | VBB Sink/Source Current | - | - | ±0.5 | mA | |
| TA | Operating Temperature Range | - | - | -40 to +85 | °C | |
| Tstg | Storage Temperature | - | - | -65 to +150 | °C | |
| θJA | Thermal Resistance (Junction-to-Ambient) | Still Air | - | - | 80 | °C/W |
| θJC | Thermal Resistance (Junction-to-Case) | - | - | 12 to 17 | °C/W |
Key Features
- Low skew 2:1:10 differential driver designed for clock distribution.
- Accepts two clock sources into an input multiplexer.
- Supports differential and single-ended PECL input signals, and HSTL inputs in PECL mode.
- Typical output-to-output skew of 20 ps and device-to-device skew of 85 ps.
- Jitter less than 1 ps RMS and additive RMS phase jitter of 60 fs @ 156.25 MHz.
- Maximum frequency greater than 3 GHz.
- VBB output for reference voltage.
- Typical propagation delay of 430 ps.
- Temperature compensation.
- PECL and HSTL mode operating ranges: VCC = 2.375 V to 3.8 V with VEE = 0 V, and VCC = 0 V with VEE = -2.375 V to -3.8 V.
- Open input default state and LVDS input compatibility.
- Fully compatible with MC100EP111 and available in Pb-free packages.
Applications
- High-performance clock distribution in +3.3 V or +2.5 V systems.
- Distribution of low skew clocks across backplanes or boards.
- Gigabit Ethernet (GbE) and Fibre Channel redundant fan-out applications.
- High-speed data transmission systems requiring precise clock signals.
Q & A
- What is the primary function of the MC100LVEP111FA?
The MC100LVEP111FA is a low skew 2:1:10 differential driver designed for high-performance clock distribution.
- What input signal types does the MC100LVEP111FA support?
The device supports differential and single-ended PECL input signals, as well as HSTL inputs when operating in PECL mode.
- What is the typical output-to-output skew of the MC100LVEP111FA?
The typical output-to-output skew is 20 ps.
- What is the maximum frequency the MC100LVEP111FA can operate at?
The maximum frequency is greater than 3 GHz.
- Does the MC100LVEP111FA have temperature compensation?
Yes, the device includes temperature compensation.
- What are the operating voltage ranges for the MC100LVEP111FA in PECL and NECL modes?
In PECL mode, VCC = 2.375 V to 3.8 V with VEE = 0 V. In NECL mode, VCC = 0 V with VEE = -2.375 V to -3.8 V.
- Is the MC100LVEP111FA compatible with other devices?
Yes, it is fully compatible with the MC100EP111.
- What is the typical propagation delay of the MC100LVEP111FA?
The typical propagation delay is 430 ps.
- Can unused output pairs be left open without affecting skew?
Yes, unused output pairs may be left open (unterminated) without affecting skew.
- Is the MC100LVEP111FA available in Pb-free packages?
Yes, Pb-free packages are available.
- What are some common applications for the MC100LVEP111FA?
Common applications include high-performance clock distribution in +3.3 V or +2.5 V systems, GbE and Fibre Channel redundant fan-out, and high-speed data transmission systems.
