Overview
The PTN3460BS/F3518, produced by NXP USA Inc., is an embedded DisplayPort (eDP) to LVDS bridge device. This component enables connectivity between an eDP source, such as a CPU or GPU, and an LVDS display panel. It processes the incoming DisplayPort stream, performs the necessary protocol conversion, and transmits the processed stream in LVDS format. The PTN3460 is designed to provide high flexibility and compatibility with various platform environments, making it a versatile solution for display connectivity in different applications.
Key Specifications
Specification | Details |
---|---|
DisplayPort Link Rate | 1.62 Gbit/s or 2.7 Gbit/s |
DisplayPort Lanes | 1-lane or 2-lane operation |
LVDS Signaling | Single bus or dual bus, 18 bits or 24 bits per pixel |
Pixel Clock Frequency | Up to 112 MHz |
LVDS Data Packing | VESA or JEIDA format |
Power Supply | 3.3 V ± 10% (integrated regulator switched on) or 3.3 V ± 10%, 1.8 V ± 5% (integrated regulator switched off) |
Package | HVQFN56 7 mm x 7 mm, 0.4 mm pitch |
Operating Temperature | 0°C to 70°C |
ESD Protection | 8 kV HBM, 1 kV CDM |
Key Features
- Embedded microcontroller and on-chip Non-Volatile Memory (NVM) for firmware updates
- LVDS panel power-up/down sequencing control and firmware-controlled timing parameters
- No external timing reference needed
- EDID ROM emulation to support panels without EDID ROM, supporting EDID structure v1.3 and up to seven different EDID data structures
- eDP complying PWM signal generation or PWM signal pass-through from eDP source
- Programmable LVDS signal swing for channel attenuation or power saving
- Support for PCB routing flexibility through LVDS bus swapping, channel swapping, and differential signal pair swapping
- Data Enable polarity programming and DDC control for EDID ROM access via I²C-bus interface up to 400 kbit/s
- Device programmability via multi-level configuration pins, DP AUX interface, and I²C-bus interface
- Low-power state and deep power-saving state via dedicated pin
Applications
- All-in-One (AIO) platforms
- Notebook platforms
- Netbooks and net tops
Q & A
- What is the primary function of the PTN3460BS/F3518? The primary function is to bridge the connection between an embedded DisplayPort (eDP) source and an LVDS display panel.
- What are the supported DisplayPort link rates? The PTN3460 supports link rates of 1.62 Gbit/s or 2.7 Gbit/s.
- Can the PTN3460 operate with different numbers of DisplayPort lanes? Yes, it supports both 1-lane and 2-lane DisplayPort operation.
- What are the supported LVDS signaling modes? It supports single bus or dual bus LVDS signaling with color depths of 18 bits or 24 bits per pixel.
- What is the maximum pixel clock frequency supported by the PTN3460? The maximum pixel clock frequency is up to 112 MHz.
- How does the PTN3460 handle panels without EDID ROM? It can emulate EDID ROM behavior to support panels without EDID ROM.
- What are the power supply options for the PTN3460? It can be powered by either a 3.3 V supply only or dual supplies (3.3 V / 1.8 V).
- What is the package type and dimensions of the PTN3460? It is available in the HVQFN56 package with dimensions of 7 mm x 7 mm and a 0.4 mm pitch.
- What is the operating temperature range of the PTN3460? The operating temperature range is from 0°C to 70°C.
- What are some of the key applications for the PTN3460? Key applications include AIO platforms, notebook platforms, and netbooks/net tops.