Overview
The PCA9517D,112, produced by NXP USA Inc., is a CMOS integrated circuit designed to provide level shifting and buffering for I²C-bus or SMBus applications. This device enables seamless communication between low-voltage and high-voltage segments of an I²C bus, supporting voltages from 0.9 V to 5.5 V. It is particularly useful in mixed-mode systems where different voltage levels are required, ensuring no degradation in system performance during level shifting.
Key Specifications
Parameter | Conditions | Min | Typ | Max | Unit |
---|---|---|---|---|---|
VCCB supply voltage, B-side bus | 2.7 | 5.5 | V | ||
VCCA supply voltage, A-side bus | 0.9 | 5.5 | V | ||
ICC(VCCA) supply current on pin VCCA | 1 | mA | |||
ICCH HIGH-state supply current both channels HIGH | VCC = 5.5 V; SDAn = SCLn = VCC | 1.5 | 5 | mA | |
ICCL LOW-state supply current both channels LOW | VCC = 5.5 V | mA | |||
Clock frequency | 0 | 400 | kHz | ||
ESD protection | 2000 | V HBM |
Key Features
- Level Translation: Supports voltage translation between 0.9 V and 5.5 V on the A-side and 2.7 V to 5.5 V on the B-side.
- Bidirectional Buffering: Provides bidirectional buffering for both the data (SDA) and the clock (SCL) lines, enabling two buses of 400 pF capacitance.
- Open-Drain I/O: Open-drain input/outputs with overvoltage tolerance up to 5.5 V.
- Lock-Up Free Operation: Ensures lock-up free operation and supports arbitration and clock stretching across the repeater.
- Active-High Repeater Enable: Features an active-high enable (EN) input with an internal pullup to VCCB, allowing selective activation of the repeater.
- High-Impedance When Unpowered: I²C-bus pins are high-impedance when the device is unpowered.
- ESD Protection: Exceeds 2000 V HBM per JESD22-A114 and 150 V MM per JESD22-A115.
Applications
The PCA9517D,112 is suitable for various applications requiring level translation and bus extension in I²C-bus systems. Typical use cases include:
- Mixed-Voltage Systems: Translating between different voltage levels in mixed-mode systems without degrading system performance.
- Bus Extension: Extending the I²C bus by providing bidirectional buffering, allowing connection of two buses with up to 400 pF capacitance each.
- Isolation of Bus Segments: Isolating two halves of a bus for both voltage and capacitance, ensuring reliable operation in complex systems.
- Automotive and Industrial Systems: Used in automotive and industrial environments where multiple voltage levels and robust ESD protection are necessary.
Q & A
- What is the primary function of the PCA9517D,112?
The primary function is to provide level shifting and buffering between low-voltage and high-voltage segments of an I²C bus.
- What voltage ranges does the PCA9517D,112 support?
The A-side supports voltages from 0.9 V to 5.5 V, and the B-side supports voltages from 2.7 V to 5.5 V.
- Can the PCA9517D,112 handle multiple masters on the I²C bus?
Yes, it accommodates Standard mode and Fast mode I²C-bus devices and multiple masters.
- What is the maximum clock frequency supported by the PCA9517D,112?
The maximum clock frequency is 400 kHz.
- Is the PCA9517D,112 ESD protected?
Yes, it exceeds 2000 V HBM per JESD22-A114 and 150 V MM per JESD22-A115.
- How does the PCA9517D,112 handle power-up sequences?
The device includes a power-up circuit that keeps the output drivers turned off until VCCB is above 2.5 V and VCCA is above 0.8 V. VCCB and VCCA can be applied in any sequence at power-up.
- Can multiple PCA9517D,112 devices be connected in series?
Yes, multiple devices can be connected in series, A side to B side, without buildup in offset voltage.
- What is the purpose of the active-high enable (EN) input?
The active-high enable input allows the user to select when the repeater is active, useful for isolating a badly behaved slave on power-up reset.
- Are the I²C-bus pins high-impedance when the device is unpowered?
Yes, the I²C-bus pins are high-impedance when the device is unpowered.
- Can the PCA9517D,112 support clock stretching and arbitration across the repeater?
No, it does not support clock stretching and arbitration across the repeater.