Overview
The PCA9517DP,118 from NXP USA Inc. is a CMOS integrated circuit designed to provide level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I²C-bus or SMBus applications. This level translating I²C-bus repeater enables the extension of the I²C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus allowing the isolation of two halves of a bus for both voltage and capacitance.
Key Specifications
| Parameter | Conditions | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| VCCB supply voltage, B-side bus | 2.7 | 5.5 | V | ||
| VCCA supply voltage, A-side bus | 0.9 | 5.5 | V | ||
| ICC(VCCA) supply current on pin VCCA | 1 | mA | |||
| ICCH HIGH-state supply current both channels HIGH; VCC = 5.5 V; SDAn = SCLn = VCC | 1.5 | 5 | mA | ||
| ICCL LOW-state supply current both channels LOW; VCC = 5.5 V | mA | ||||
| Package | 8-TSSOP, 8-MSOP (0.118, 3.00mm Width) | ||||
| Pin Count | 8 | ||||
| Clock Frequency | 0 | 400 | kHz | ||
| ESD Protection | 2000 | V HBM |
Key Features
- Provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I²C-bus or SMBus applications.
- Bidirectional buffering for both the data (SDA) and the clock (SCL) lines, enabling the extension of the I²C-bus.
- Supports Standard mode and Fast mode I²C-bus devices and multiple masters.
- Lock-up free operation and supports arbitration and clock stretching across the repeater.
- Powered-off high-impedance I²C-bus pins.
- Open-drain input/outputs and active HIGH repeater enable input.
- ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115.
- Multiple PCA9517s can be connected in series without build-up in offset voltage.
Applications
- I²C-bus or SMBus systems requiring voltage level translation.
- Extension of I²C-bus lines to increase the number of devices on the bus.
- Isolation of different voltage domains within a system.
- Systems requiring bidirectional buffering and level shifting for SDA and SCL lines.
- Automotive, industrial, and consumer electronics where I²C-bus or SMBus is used.
Q & A
- What is the primary function of the PCA9517DP,118?
The PCA9517DP,118 is a level translating I²C-bus repeater that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I²C-bus or SMBus applications.
- What are the operating voltage ranges for the A-side and B-side buses?
The A-side operating supply voltage range is from 0.9 V to 5.5 V, and the B-side operating supply voltage range is from 2.7 V to 5.5 V.
- What is the maximum clock frequency supported by the PCA9517DP,118?
The PCA9517DP,118 supports clock frequencies from 0 Hz to 400 kHz.
- Does the PCA9517DP,118 support multiple masters on the I²C-bus?
Yes, the PCA9517DP,118 supports multiple masters on the I²C-bus and accommodates Standard mode and Fast mode I²C-bus devices.
- What is the package type and pin count of the PCA9517DP,118?
The PCA9517DP,118 comes in an 8-TSSOP or 8-MSOP package with 8 pins.
- How does the PCA9517DP,118 handle ESD protection?
The PCA9517DP,118 has ESD protection that exceeds 2000 V HBM per JESD22-A114 and 150 V MM per JESD22-A115.
- Can multiple PCA9517DP,118 devices be connected in series?
Yes, multiple PCA9517DP,118 devices can be connected in series without any build-up in offset voltage.
- What is the purpose of the enable (EN) pin on the PCA9517DP,118?
The enable (EN) pin is used to turn the drivers on and off under system control. It should only be changed when the bus is idle.
- Are the inputs and I/Os of the PCA9517DP,118 overvoltage tolerant?
Yes, all inputs and I/Os are overvoltage tolerant to 5.5 V even when the device is unpowered.
- What are some common applications of the PCA9517DP,118?
The PCA9517DP,118 is commonly used in I²C-bus or SMBus systems requiring voltage level translation, extension of I²C-bus lines, and isolation of different voltage domains within a system.
