Overview
The TMS320DM647ZUTD7 is a high-performance digital media processor developed by Texas Instruments. It is part of the TMS320C6000™ DSP platform and is based on the third-generation advanced VelociTI™ very-long-instruction-word (VLIW) architecture. This processor is designed to handle demanding digital media applications with its exceptional processing capabilities and extensive feature set. The DM647 device is fully software-compatible with previous C64x devices, ensuring seamless integration and code compatibility. It operates at clock rates of 720 MHz, 800 MHz, 900 MHz, and 1.1 GHz, making it an excellent choice for applications requiring high computational power.
Key Specifications
| Parameter | Specification |
|---|---|
| Clock Rates | 720 MHz, 800 MHz, 900 MHz, 1.1 GHz |
| Instruction Cycle Time | 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), 0.91 ns (-1100) |
| MIPS | 5760, 6400, 7200, 8800 |
| C64x+ Instructions/Cycle | Eight 32-Bit Instructions/Cycle |
| L1 Memory | 256K-bit (32K-byte) L1P Program RAM/Cache, 256K-bit (32K-byte) L1D Data RAM/Cache |
| L2 Memory | 2M-bit/256K-byte Unified Mapped RAM/Cache |
| Package | 529-pin nFBGA (ZUT suffix), 19x19 mm 0.8 mm pitch BGA |
| Process Technology | 0.09-μm/6-Level Cu Metal Process (CMOS) |
| Power Supply | 3.3-V and 1.8-V I/O, 1.2-V Internal |
| GPIO Pins | 32 General-Purpose I/O (GPIO) Pins |
| Temperature Ranges | Commercial, Extended, and Industrial Temperature Ranges |
Key Features
- Advanced VelociTI.2™ extensions to VelociTI™ VLIW architecture
- Eight highly independent functional units, including six ALUs (32-/40-Bit)
- On-Chip ROM Bootloader and Individual Power-Saving Modes
- Flexible PLL Clock Generators and IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
- Five configurable video port peripherals supporting multiple resolutions and video standards
- 1000 Mbps Ethernet Switch Subsystem with MDIO module and two SGMII interfaces
- Support for Little Endian Mode Only and multiple external memory interfaces (EMIFs)
- VLYNQ™ Interface (FPGA Interface) and user-configurable 16-bit or 32-bit host-port interface (HPI)
- Multichannel audio serial port (McASP) with ten serializers and four 64-bit general-purpose timers
Applications
- Digital Video Recording and Playback
- Video Encoding and Decoding
- Audio Processing and Encoding
- High-Performance Computing in Embedded Systems
- Industrial Automation and Control Systems
- Medical Imaging and Diagnostic Equipment
Q & A
- What is the TMS320DM647ZUTD7?
The TMS320DM647ZUTD7 is a high-performance digital media processor developed by Texas Instruments, part of the TMS320C6000™ DSP platform.
- What are the clock rates of the TMS320DM647ZUTD7?
The clock rates are 720 MHz, 800 MHz, 900 MHz, and 1.1 GHz.
- What is the instruction cycle time for each clock rate?
The instruction cycle times are 1.39 ns (-720), 1.25 ns (-800), 1.11 ns (-900), and 0.91 ns (-1100).
- How many MIPS does the TMS320DM647ZUTD7 achieve?
The processor achieves 5760, 6400, 7200, and 8800 MIPS at different clock rates.
- What is the memory architecture of the TMS320DM647ZUTD7?
The processor features 256K-bit (32K-byte) L1P Program RAM/Cache and L1D Data RAM/Cache, along with 2M-bit/256K-byte L2 Unified Mapped RAM/Cache.
- What package options are available for the TMS320DM647ZUTD7?
The processor is available in a 529-pin nFBGA (ZUT suffix) package with a 19x19 mm 0.8 mm pitch BGA.
- What are the power supply requirements for the TMS320DM647ZUTD7?
The processor requires 3.3-V and 1.8-V I/O, with a 1.2-V internal supply.
- Does the TMS320DM647ZUTD7 support temperature ranges other than commercial?
Yes, it supports extended and industrial temperature ranges as well.
- What video standards does the TMS320DM647ZUTD7 support?
The processor supports multiple video standards, including CCIR601, ITU-BT.656, BT.1120, SMPTE 125M, 260M, 274M, and 296M.
- What is the purpose of the VLYNQ™ Interface in the TMS320DM647ZUTD7?
The VLYNQ™ Interface is used for FPGA communication.
