Overview
The TMS320DM642, produced by Texas Instruments, is a high-performance digital media processor based on the second-generation VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™). This device is part of the TMS320C6000™ DSP platform and is particularly suited for digital media applications. With a clock rate of up to 720 MHz, it offers up to 5760 million instructions per second (MIPS), making it an excellent choice for high-performance DSP programming challenges. The DM642 combines the operational flexibility of high-speed controllers with the numerical capability of array processors, featuring 64 general-purpose registers and eight highly independent functional units.
Key Specifications
| Parameter | Specification |
|---|---|
| Instruction Cycle Time | 2-, 1.67-, 1.39-ns |
| Clock Rate | 500-, 600-, 720-MHz |
| Instructions/Cycle | Eight 32-Bit Instructions/Cycle |
| MIPS | 4000, 4800, 5760 MIPS |
| Functional Units | Eight Highly Independent Functional Units (Six ALUs, Two Multipliers) |
| Cache Memory | 128K-Bit (16K-Byte) L1P Program Cache, 128K-Bit (16K-Byte) L1D Data Cache, 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache |
| External Memory Space | 1024M-Byte Total Addressable External Memory Space |
| Package Type | 548-Pin Ball Grid Array (BGA) Package |
| Voltage | 3.3-V I/O, 1.2-V or 1.4-V Internal |
Key Features
- High-Performance Digital Media Processor with up to 5760 MIPS at 720 MHz
- Eight Highly Independent Functional Units with VelociTI.2™ Extensions
- Six ALUs (32-/40-Bit) and Two Multipliers supporting various arithmetic operations per clock cycle
- Byte-Addressable (8-/16-/32-/64-Bit Data) with 8-Bit Overflow Protection
- Bit-Field Extract, Set, Clear, Normalization, Saturation, Bit-Counting
- Glueless Interface to Asynchronous and Synchronous Memories
- IEEE 802.3 Compliant with Media Independent Interface (MII)
- Eight Independent Transmit (TX) Channels and One Receive (RX) Channel
- Supports Multiple Resolutions and Video Standards with Audio/Video Synchronization
- Three Configurable Video Port Peripherals (VP0, VP1, VP2)
- Flexible PLL Clock Generator and IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
Applications
The TMS320DM642 is designed for a wide range of digital media applications, including:
- Video and Imaging Processing
- Audio/Video Synchronization
- High-Performance DSP Programming
- Digital Media Encoding and Decoding
- Real-Time Video Processing
- Embedded Systems Requiring High Computational Power
Q & A
- What is the maximum clock rate of the TMS320DM642?
The maximum clock rate of the TMS320DM642 is 720 MHz.
- How many instructions can the TMS320DM642 execute per cycle?
The TMS320DM642 can execute eight 32-bit instructions per cycle.
- What is the total addressable external memory space of the TMS320DM642?
The total addressable external memory space is 1024M-Byte.
- Does the TMS320DM642 support video and imaging applications?
- What type of package does the TMS320DM642 come in?
The TMS320DM642 comes in a 548-Pin Ball Grid Array (BGA) Package.
- Is the TMS320DM642 compatible with other C6000™ DSPs?
- What is the voltage requirement for the TMS320DM642?
The TMS320DM642 requires 3.3-V I/O and either 1.2-V or 1.4-V internal voltage.
- Does the TMS320DM642 support Ethernet communication?
- How many video port peripherals does the TMS320DM642 have?
The TMS320DM642 has three configurable video port peripherals (VP0, VP1, VP2).
- Is the TMS320DM642 JTAG boundary-scan compatible?
