Overview
The TMS320C6746BZCE3 is a fixed- and floating-point Digital Signal Processor (DSP) from Texas Instruments, based on the C674x DSP core. This low-power applications processor is designed to provide significantly lower power consumption compared to other members of the TMS320C6000 platform. It enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly develop devices with robust operating systems, rich user interfaces, and high processor performance through its fully integrated, mixed processor solution.
Key Specifications
| Specification | Details |
|---|---|
| Processor Core | 375- and 456-MHz C674x Fixed- and Floating-Point VLIW DSP |
| Instruction Set | Superset of the C67x+ and C64x+ ISAs, up to 3648 MIPS and 2746 MFLOPS |
| Cache Memory | 32KB of L1P Program RAM/Cache, 32KB of L1D Data RAM/Cache, 256KB of L2 Unified Mapped RAM/Cache |
| General-Purpose Registers | 64 general-purpose registers (32-bit) |
| ALU Functional Units | Six ALU (32- and 40-bit) functional units |
| Floating-Point Support | Supports 32-bit integer, SP (IEEE Single Precision/32-bit), and DP (IEEE Double Precision/64-bit) floating point |
| Memory Controllers | DDR2/Mobile DDR controller, EMIFA for asynchronous and SDRAM external memory |
| Peripheral Interfaces | USB 2.0 OTG, Multichannel Audio Serial Port (McASP), Multichannel Buffered Serial Ports (McBSPs), 10/100 Mbps Ethernet MAC (EMAC), Video Port Interface (VPIF) |
| Package | NFBGA (361), 13 mm x 13 mm (ZCE), 16 mm x 16 mm (ZWT) |
| Voltage | Core: 1.2V or 1.3V, I/O: 1.8V or 3.3V |
Key Features
- Low Power Consumption: Significantly lower power than other members of the TMS320C6000 platform.
- High Performance: Up to 3648 MIPS and 2746 MFLOPS.
- Flexible Cache Architecture: 32KB of L1P and L1D cache, 256KB of L2 unified mapped RAM/cache.
- Programmable Real-Time Unit Subsystem (PRUSS): Two independent PRU cores with 32-bit load-store RISC architecture.
- Enhanced Direct Memory Access Controller 3 (EDMA3): 64 independent DMA channels, 16 quick DMA channels.
- Rich Peripheral Set: Includes USB 2.0 OTG, McASP, McBSPs, EMAC, VPIF, and more.
- Development Tools: C compilers, DSP assembly optimizer, Windows debugger interface.
Applications
- Currency Inspection: Used in systems for detecting and verifying currency.
- Biometric Identification: Employed in biometric systems for identification purposes.
- Machine Vision (Low-End): Suitable for low-end machine vision applications.
Q & A
- What is the TMS320C6746BZCE3 based on?
The TMS320C6746BZCE3 is based on the C674x DSP core.
- What are the key performance metrics of the TMS320C6746BZCE3?
It offers up to 3648 MIPS and 2746 MFLOPS.
- What is the cache architecture of the TMS320C6746BZCE3?
It features a 2-level cache architecture with 32KB of L1P and L1D cache and 256KB of L2 unified mapped RAM/cache.
- What types of memory controllers does the TMS320C6746BZCE3 support?
It supports DDR2/Mobile DDR and EMIFA for asynchronous and SDRAM external memory.
- What peripheral interfaces are available on the TMS320C6746BZCE3?
It includes USB 2.0 OTG, McASP, McBSPs, EMAC, VPIF, and more.
- What is the PRUSS subsystem in the TMS320C6746BZCE3?
The PRUSS subsystem consists of two independent PRU cores with 32-bit load-store RISC architecture.
- What development tools are available for the TMS320C6746BZCE3?
Available tools include C compilers, DSP assembly optimizer, and a Windows debugger interface.
- What are some typical applications of the TMS320C6746BZCE3?
It is used in currency inspection, biometric identification, and low-end machine vision applications.
- What are the package options for the TMS320C6746BZCE3?
It is available in NFBGA (361) packages with sizes 13 mm x 13 mm (ZCE) and 16 mm x 16 mm (ZWT).
- What are the voltage requirements for the TMS320C6746BZCE3?
The core voltage is 1.2V or 1.3V, and the I/O voltage is 1.8V or 3.3V.
