Overview
The Texas Instruments TMS320C6743BPTP3 is a low-power digital signal processor (DSP) based on the C674x DSP core. This device is designed to consume significantly lower power compared to other members of the TMS320C6000™ platform of DSPs. It enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices featuring high processing performance. The C6743 DSP core utilizes a two-level cache-based architecture, including a 32-KB Level 1 program cache (L1P) and a 32-KB Level 1 data cache (L1D), along with a 128-KB Level 2 cache shared between program and data space.
Key Specifications
| Specification | Details |
|---|---|
| Core Frequency | Up to 375 MHz |
| Cache Architecture | Level 1: 32-KB direct mapped program cache (L1P) and 32-KB 2-way set-associative data cache (L1D) Level 2: 128-KB shared between program and data space |
| Registers | 64 general-purpose registers (32-bit) |
| Functional Units | Six ALU (32- and 40-bit) functional units Two multiply functional units |
| Floating Point Support | Supports 32-bit integer, SP (IEEE Single Precision/32-bit), and DP (IEEE Double Precision/64-bit) floating point Supports up to four SP additions per clock, four DP additions every two clocks |
| Fixed-Point Multiply | Supports two 32 x 32-bit multiplies, four 16 x 16-bit multiplies, or eight 8 x 8-bit multiplies per clock cycle |
| Memory Interfaces | Asynchronous external memory interface (EMIFA) Higher speed memory interface (EMIFB) for SDRAM |
| Peripheral Set | 10/100 Mbps Ethernet MAC (EMAC) with MDIO module Two I2C Bus interfaces Two multichannel audio serial ports (McASPs) Two 64-bit general-purpose timers Up to 8 banks of 16 pins of GPIO Two UART interfaces Three eHRPWM peripherals Three eCAP module peripherals Two eQEP peripherals |
| Package | 176-Pin Thin Quad Flat Pack (TQFP) or 256-Ball Pb-Free Plastic Ball Grid Array (PBGA) |
| Voltage | Core: 1.2 V, I/O: 3.3 V |
Key Features
- Low-power consumption compared to other TMS320C6000™ DSPs
- 375-MHz fixed- and floating-point VLIW DSP core
- Load-store architecture with nonaligned support
- Mixed-precision IEEE floating-point multiply support
- Instruction packing reduces code size, and all instructions are conditional
- Hardware support for modulo loop operations
- Enhanced Direct-Memory-Access Controller (EDMA3)
- Rich peripheral set including Ethernet MAC, I2C Bus interfaces, McASPs, timers, GPIO, UARTs, eHRPWM, eCAP, and eQEP peripherals
- Support for multimedia card (MMC)/Secure Digital (SD) card interface with Secure Data I/O (SDIO)
Applications
- Networking: Supports 10/100 Mbps Ethernet MAC (EMAC) for efficient network communication
- High-Speed Encoding: Suitable for high-speed data processing and encoding applications
- Professional Audio: Features multichannel audio serial ports (McASPs) and support for various audio formats
- Industrial Automation: Utilizes enhanced peripherals like eHRPWM, eCAP, and eQEP for precise control and measurement
- Embedded Systems: Ideal for systems requiring high processing performance and low power consumption
Q & A
- What is the core frequency of the TMS320C6743BPTP3?
The core frequency of the TMS320C6743BPTP3 is up to 375 MHz.
- What type of cache architecture does the TMS320C6743BPTP3 use?
The TMS320C6743BPTP3 uses a two-level cache-based architecture with a 32-KB Level 1 program cache (L1P) and a 32-KB Level 1 data cache (L1D), along with a 128-KB Level 2 cache shared between program and data space.
- What are the key functional units of the TMS320C6743BPTP3?
The key functional units include six ALU (32- and 40-bit) functional units and two multiply functional units.
- What types of floating-point operations does the TMS320C6743BPTP3 support?
The TMS320C6743BPTP3 supports 32-bit integer, SP (IEEE Single Precision/32-bit), and DP (IEEE Double Precision/64-bit) floating point operations, including up to four SP additions per clock and four DP additions every two clocks.
- What are the memory interfaces available on the TMS320C6743BPTP3?
The TMS320C6743BPTP3 features an asynchronous external memory interface (EMIFA) and a higher speed memory interface (EMIFB) for SDRAM.
- What is the peripheral set of the TMS320C6743BPTP3?
The peripheral set includes a 10/100 Mbps Ethernet MAC (EMAC) with MDIO module, two I2C Bus interfaces, two multichannel audio serial ports (McASPs), two 64-bit general-purpose timers, up to 8 banks of 16 pins of GPIO, two UART interfaces, three eHRPWM peripherals, three eCAP module peripherals, and two eQEP peripherals.
- What are the package options for the TMS320C6743BPTP3?
The TMS320C6743BPTP3 is available in a 176-Pin Thin Quad Flat Pack (TQFP) or a 256-Ball Pb-Free Plastic Ball Grid Array (PBGA).
- What are the voltage specifications for the TMS320C6743BPTP3?
The core voltage is 1.2 V, and the I/O voltage is 3.3 V.
- What software support is available for the TMS320C6743BPTP3?
The TMS320C6743BPTP3 is supported by TI DSP/BIOS™, Chip Support Library, and DSP Library.
- What are some common applications of the TMS320C6743BPTP3?
Common applications include networking, high-speed encoding, professional audio, industrial automation, and embedded systems requiring high processing performance and low power consumption.
