Overview
The TMS320C6743BPTP2 is a low-power digital signal processor (DSP) from Texas Instruments, based on the C674x DSP core. This device is designed to consume significantly lower power compared to other members of the TMS320C6000™ platform of DSPs. It enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices featuring high processing performance. The C6743 DSP core utilizes a two-level cache-based architecture, including a 32-KB Level 1 program cache (L1P) and a 32-KB Level 1 data cache (L1D), along with a 128-KB Level 2 program cache (L2P) that can be configured as mapped memory, cache, or combinations of the two.
Key Specifications
| Specification | Details |
|---|---|
| Core Frequency | Up to 375 MHz |
| Cache Architecture | Level 1: 32-KB direct mapped program cache (L1P) and 32-KB 2-way set-associative data cache (L1D) Level 2: 128-KB shared program and data cache (L2P) |
| Registers | 64 general-purpose registers (32-bit) |
| Functional Units | Six ALU (32- and 40-bit) functional units, two multiply functional units |
| Floating Point Support | Supports 32-bit integer, IEEE single precision (SP), and IEEE double precision (DP) floating point operations |
| Memory Interfaces | Asynchronous external memory interface (EMIFA) and higher speed memory interface (EMIFB) for SDRAM |
| Peripheral Interfaces | 10/100 Mbps Ethernet MAC (EMAC), two I2C Bus interfaces, two multichannel audio serial ports (McASPs), two UART interfaces, three enhanced high-resolution pulse width modulators (eHRPWM), three enhanced capture (eCAP) modules, two enhanced quadrature encoded pulse (eQEP) peripherals |
| Package Options | 176-Pin Thin Quad Flat Pack (TQFP) and 256-Ball Pb-Free Plastic Ball Grid Array (PBGA) |
| Voltage | Core: 1.2 V, I/O: 3.3 V |
Key Features
- Low-power consumption compared to other TMS320C6000™ DSPs
- 375-MHz fixed- and floating-point VLIW DSP core
- Mixed-precision IEEE floating point multiply support
- Instruction packing to reduce code size and all instructions conditional
- Hardware support for modulo loop operations
- Enhanced Direct-Memory-Access Controller (EDMA3)
- Two external memory interfaces: EMIFA and EMIFB
- 10/100 Mbps Ethernet MAC (EMAC) with MDIO module
- Two multichannel audio serial ports (McASPs) with FIFO buffers
- Two 64-bit general-purpose timers, configurable as watchdog
- Up to 8 banks of 16 pins of general-purpose input/output (GPIO)
- Three enhanced high-resolution pulse width modulators (eHRPWM)
- Three 32-bit enhanced capture (eCAP) modules and two 32-bit enhanced quadrature encoded pulse (eQEP) peripherals
Applications
- Networking: Utilizes the 10/100 Mbps Ethernet MAC (EMAC) for efficient network communication
- High-Speed Encoding: Supports high-speed data processing and encoding tasks
- Professional Audio: Features multichannel audio serial ports (McASPs) for audio processing
- Industrial Automation: Uses enhanced pulse width modulators (eHRPWM) and capture modules (eCAP) for precise control
- Embedded Systems: Suitable for various embedded applications requiring high processing performance and low power consumption
Q & A
- What is the core frequency of the TMS320C6743BPTP2?
The core frequency of the TMS320C6743BPTP2 is up to 375 MHz.
- What type of cache architecture does the TMS320C6743BPTP2 use?
The TMS320C6743BPTP2 uses a two-level cache-based architecture with a 32-KB Level 1 program cache (L1P) and a 32-KB Level 1 data cache (L1D), along with a 128-KB Level 2 program cache (L2P).
- How many general-purpose registers does the TMS320C6743BPTP2 have?
The TMS320C6743BPTP2 has 64 general-purpose registers (32-bit).
- What types of floating point operations does the TMS320C6743BPTP2 support?
The TMS320C6743BPTP2 supports 32-bit integer, IEEE single precision (SP), and IEEE double precision (DP) floating point operations.
- What peripheral interfaces are available on the TMS320C6743BPTP2?
The TMS320C6743BPTP2 includes a 10/100 Mbps Ethernet MAC (EMAC), two I2C Bus interfaces, two multichannel audio serial ports (McASPs), two UART interfaces, three enhanced high-resolution pulse width modulators (eHRPWM), three enhanced capture (eCAP) modules, and two enhanced quadrature encoded pulse (eQEP) peripherals.
- What are the package options for the TMS320C6743BPTP2?
The TMS320C6743BPTP2 is available in 176-Pin Thin Quad Flat Pack (TQFP) and 256-Ball Pb-Free Plastic Ball Grid Array (PBGA) packages.
- What are the voltage requirements for the TMS320C6743BPTP2?
The core voltage is 1.2 V, and the I/O voltage is 3.3 V.
- What is the purpose of the EDMA3 controller in the TMS320C6743BPTP2?
The Enhanced Direct-Memory-Access Controller (EDMA3) is used for efficient data transfer between peripherals and memory.
- Can the TMS320C6743BPTP2 be used in professional audio applications?
Yes, the TMS320C6743BPTP2 is suitable for professional audio applications due to its multichannel audio serial ports (McASPs) and support for audio processing.
- Is the TMS320C6743BPTP2 compatible with other TMS320C6000™ DSPs?
The C674x DSP core is code-compatible with the C6000™ DSP platform and supports features of both the C64x+ and C67x+ DSP families.
