Overview
The TMS320DM6446, also known as the DM6446, is a high-performance Digital Media System-on-Chip (DMSoC) developed by Texas Instruments. This device leverages TI's DaVinci™ technology to meet the processing needs of next-generation embedded devices, particularly in networked media encode and decode applications. The DM6446 enables Original Equipment Manufacturers (OEMs) and Original Design Manufacturers (ODMs) to quickly develop devices with robust operating system support, rich user interfaces, high processing performance, and long battery life. The dual-core architecture combines a high-performance TMS320C64x+™ DSP core and an ARM926EJ-S core, providing the benefits of both DSP and Reduced Instruction Set Computer (RISC) technologies.
Key Specifications
| Parameter | Specification |
|---|---|
| C64x+ Clock Rates | 513 MHz, 594 MHz, 810 MHz |
| ARM926EJ-S Clock Rates | 256.5 MHz, 297 MHz, 405 MHz |
| L1P Program RAM/Cache | 32K-Byte (Direct Mapped) |
| L1D Data RAM/Cache | 80K-Byte (2-Way Set-Associative) |
| L2 Unified RAM/Cache | 64K-Byte |
| C64x+ MIPS | 4104, 4752, 6480 |
| Package Type | 361-Pin Pb-Free BGA (ZWT Suffix), 0.8-mm Ball Pitch |
| Supply Voltages | 3.3-V and 1.8-V I/O, 1.2-V Internal (513, 594); 3.3-V and 1.8-V I/O, 1.2-V DAC and USB, 1.3-V Internal (810) |
| General-Purpose Timers | Two 64-Bit (each configurable as two 32-bit timers) |
| Watchdog Timer | One 64-Bit |
| UARTs | Three (one with RTS and CTS flow control) |
| SPI | One (supports two slave devices) |
| I2C | Master/Slave Inter-Integrated Circuit (I2C) Bus |
| USB | USB 2.0 High-/Full-/Low-Speed Host and Client |
| GPIO Pins | Up to 71 (multiplexed with other device functions) |
Key Features
- Dual-Core Architecture: Combines a TMS320C64x+™ DSP core and an ARM926EJ-S core, providing the benefits of both DSP and RISC technologies.
- High-Performance DSP: The C64x+ DSP core offers up to 6480 MIPS at 810 MHz, with eight highly independent functional units and six arithmetic logic units (ALUs).
- Advanced VLIW Architecture: Enhanced version of the second-generation high-performance VLIW architecture, ideal for digital media applications.
- Memory and Cache: Includes 32K-Byte L1P program RAM/cache, 80K-Byte L1D data RAM/cache, and 64K-Byte L2 unified RAM/cache.
- Peripherals: Features such as three UARTs, one SPI, I2C bus, USB 2.0, ATA/ATAPI interface, and multimedia card interfaces (MMC/SD/SDIO).
- Video Processing Subsystem (VPSS): Includes Video Processing Front-End (VPFE) and Video Processing Back-End (VPBE) with imaging co-processor (VICP).
- Power Management: Individual power-saving modes for ARM and DSP, and flexible PLL clock generators.
- Debug and Test: IEEE-1149.1 (JTAG) boundary-scan-compatible and EmbeddedICE-RT™ logic for real-time debug.
Applications
- Digital Media: Suitable for networked media encode and decode, video imaging, and other high-performance digital media applications.
- Video Imaging: The VPSS with VPFE and VPBE makes it ideal for video capture and display applications.
- Embedded Devices: Enables the development of devices with robust operating systems, rich user interfaces, and long battery life.
- Industrial and Consumer Electronics: Can be used in various industrial and consumer electronics requiring high processing performance and advanced media capabilities.
Q & A
- What is the TMS320DM6446?
The TMS320DM6446 is a high-performance Digital Media System-on-Chip (DMSoC) developed by Texas Instruments, leveraging TI's DaVinci™ technology.
- What are the key components of the TMS320DM6446?
The device includes a TMS320C64x+™ DSP core and an ARM926EJ-S core, along with various peripherals and memory components.
- What are the clock rates of the C64x+ and ARM926EJ-S cores?
The C64x+ core operates at 513 MHz, 594 MHz, or 810 MHz, while the ARM926EJ-S core operates at 256.5 MHz, 297 MHz, or 405 MHz.
- What is the memory architecture of the TMS320DM6446?
The device features 32K-Byte L1P program RAM/cache, 80K-Byte L1D data RAM/cache, and 64K-Byte L2 unified RAM/cache.
- What peripherals are included in the TMS320DM6446?
The device includes three UARTs, one SPI, I2C bus, USB 2.0, ATA/ATAPI interface, and multimedia card interfaces (MMC/SD/SDIO), among others.
- What is the Video Processing Subsystem (VPSS) in the TMS320DM6446?
The VPSS includes the Video Processing Front-End (VPFE) and Video Processing Back-End (VPBE) with an imaging co-processor (VICP) for video capture and display.
- How does the TMS320DM6446 manage power?
The device features individual power-saving modes for the ARM and DSP cores, as well as flexible PLL clock generators.
- What debug and test features are available on the TMS320DM6446?
The device is IEEE-1149.1 (JTAG) boundary-scan-compatible and includes EmbeddedICE-RT™ logic for real-time debug.
- What are the typical applications of the TMS320DM6446?
The device is suitable for digital media, video imaging, and other high-performance applications in embedded devices.
- What is the package type of the TMS320DM6446?
The device is available in a 361-pin Pb-Free BGA package (ZWT suffix) with a 0.8-mm ball pitch.
