Overview
The TMS320C6670CYPA2 is a Multicore Fixed and Floating Point System on Chip (SoC) developed by Texas Instruments. It is part of the C66xx SoC family, based on TI's KeyStone Multicore SoC Architecture. This device is designed for high-performance applications such as software-defined radio, emerging broadband, and other communications segments. The TMS320C6670CYPA2 integrates four C66x CorePac DSPs, each operating at frequencies up to 1.2 GHz, enabling a combined processing power of up to 4.8 GHz. The platform is highly integrated, power-efficient, and easy to use, making it ideal for implementing multi-band, multi-standard waveforms, including proprietary air-interfaces.
Key Specifications
| Specification | Details |
|---|---|
| Package | FCBGA (CYP) with 841 pins |
| Operating Temperature Range | -40°C to 100°C |
| Core Frequency | Up to 1.2 GHz |
| Memory | 32KB L1P, 32KB L1D, 1024KB L2 per core; 2MB Shared L2; 6.25MB On-Chip RAM; 128kB ROM |
| Interfaces | EBI/EMI, Ethernet MAC, PCIe Gen2, I²C, SPI, SRIO 2.1, UART, HyperLink, Six Lane SerDes-Based Antenna Interface (AIF2) |
| Voltage | I/O: 1.0V, 1.5V, 1.8V; Core: 1.00V |
| Memory Interface | 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space |
Key Features
- Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
- 153.6 GMAC/76.8 GFLOP @ 1.2GHz
- Multicore Navigator and TeraNet Switch Fabric - 2 Tb
- Network Coprocessors: Packet Accelerator, Security Accelerator
- Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
- Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
- HyperLink - 50Gbaud Operation, Full Duplex
- Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
- Hardware Coprocessors for Turbo Encoding, Turbo Decoding, Viterbi Decoding, FFT, Bit Rate CoProcessing, and more
- I2C Interface, 16 GPIO Pins, SPI Interface
- Eight 64-Bit Timers, Three On-Chip PLLs
Applications
The TMS320C6670CYPA2 is versatile and can be employed in various fields that require advanced signal processing, including:
- Software-defined radio
- Emerging broadband and communications
- Audio, speech, image, and video processing
- Biomedical processing
- Multi-band, multi-standard waveforms and proprietary air-interfaces
Q & A
- What is the TMS320C6670CYPA2?
The TMS320C6670CYPA2 is a Multicore Fixed and Floating Point System on Chip developed by Texas Instruments.
- How many DSP cores does it have?
It has four TMS320C66x DSP Core Subsystems.
- What are the operating frequencies of the DSP cores?
The DSP cores operate at frequencies up to 1.2 GHz.
- What types of memory does it have?
It includes 32KB L1P, 32KB L1D, 1024KB L2 per core, 2MB Shared L2, 6.25MB On-Chip RAM, and 128kB ROM.
- What interfaces are supported by the TMS320C6670CYPA2?
It supports EBI/EMI, Ethernet MAC, PCIe Gen2, I²C, SPI, SRIO 2.1, UART, HyperLink, and Six Lane SerDes-Based Antenna Interface (AIF2).
- What is the operating temperature range of the device?
The operating temperature range is -40°C to 100°C.
- What is the power consumption and voltage requirements?
The device operates with I/O voltages of 1.0V, 1.5V, and 1.8V, and a core voltage of 1.00V.
- What are some of the hardware coprocessors available?
It includes hardware coprocessors for Turbo Encoding, Turbo Decoding, Viterbi Decoding, FFT, Bit Rate CoProcessing, and more.
- What are the typical applications of the TMS320C6670CYPA2?
It is used in software-defined radio, emerging broadband, communications, audio, speech, image, video processing, and biomedical processing.
- Is the TMS320C6670CYPA2 backward compatible with other DSPs?
Yes, it is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.
- What is the package type and pin count of the TMS320C6670CYPA2?
The device comes in an FCBGA (CYP) package with 841 pins.
