Overview
The SN65CML100DGKR-P, produced by Texas Instruments, is a high-speed translator/repeater designed to support signaling rates up to 1.5 Gbps. This device is particularly useful in various high-speed network routing applications, including level translation from LVDS (Low-Voltage Differential Signaling), LVPECL (Low-Voltage Positive Emitter-Coupled Logic), and CML (Current-Mode Logic) to CML. It features a unidirectional signal translation capability, making it suitable for applications requiring precise timing and low jitter.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Manufacturer | Texas Instruments | |
| Part Number | SN65CML100DGKR-P | |
| Package Type | 8-VSSOP, 8-MSOP | |
| Operating Temperature Range | -40°C to 85°C | °C |
| Supply Voltage Range | -0.5 V to 4 V | V |
| Input Signal Compatibility | CML, LVDS, LVPECL | |
| Output Signal Format | CML | |
| Data Rate | Up to 1.5 Gbps | Gbps |
| Number of Circuits | 1 | |
| Channels per Circuit | 1 | |
| Channel Type | Unidirectional | |
| Propagation Delay Time | 250 ps to 800 ps | ps |
| Total Jitter | < 70 ps | ps |
| Part-To-Part Skew | < 100 ps | ps |
Key Features
- Provides level translation from LVDS or LVPECL to CML, and repeating from CML to CML.
- Supports signaling rates up to 1.5 Gbps.
- CML compatible output directly drives devices with 3.3-V, 2.5-V, or 1.8-V supplies.
- Total jitter < 70 ps and low part-to-part skew < 100 ps.
- Wide common-mode receiver capability allows direct coupling of input signals.
- Propagation delay times up to 800 ps.
- Available in SOIC and MSOP packages.
- Operates with a single 3.3-V supply.
- Internal data path is fully differential for low noise generation and low pulse-width distortion.
- Compact package suitable for space-constrained applications.
Applications
- Level translation in mixed-signal IC applications.
- High-speed network routing.
- Wireless basestations.
- 622-MHz central office clock distribution.
- Low jitter clock repeater.
- High-speed data acquisition systems.
- Communications and networking equipment.
Q & A
- What is the primary function of the SN65CML100DGKR-P?
The SN65CML100DGKR-P is a high-speed translator/repeater designed for level translation from LVDS or LVPECL to CML, and repeating from CML to CML, supporting signaling rates up to 1.5 Gbps.
- What are the compatible input signal formats for this device?
The device is compatible with CML, LVDS, and LVPECL input signals.
- What is the output signal format of the SN65CML100DGKR-P?
The output signal format is CML (Current-Mode Logic).
- What is the maximum data rate supported by this device?
The device supports data rates up to 1.5 Gbps.
- What are the available package types for the SN65CML100DGKR-P?
The device is available in 8-VSSOP and 8-MSOP packages.
- What is the operating temperature range of the SN65CML100DGKR-P?
The operating temperature range is from -40°C to 85°C.
- What is the significance of the VBB pin in the SN65CML100DGKR-P?
The VBB pin is an internally generated voltage supply that allows operation with a single-ended LVPECL input. It should be decoupled with a 0.01-uF capacitor and limited to 400 uA current sourcing or sinking.
- What are some typical applications of the SN65CML100DGKR-P?
Typical applications include high-speed network routing, wireless basestations, 622-MHz central office clock distribution, and low jitter clock repeater.
- Does the SN65CML100DGKR-P support single-ended LVPECL input operation?
Yes, the device supports single-ended LVPECL input operation by connecting the unused differential input to the VBB pin as a switching reference voltage.
- What is the total jitter and part-to-part skew of the SN65CML100DGKR-P?
The total jitter is less than 70 ps, and the part-to-part skew is less than 100 ps.
