Overview
The SN65CML100DGKR is a high-speed translator/repeater designed by Texas Instruments for signaling rates up to 1.5 Gbps. This device is optimized to support various high-speed network routing applications. It provides level translation from LVDS (Low-Voltage Differential Signaling) or LVPECL (Low-Voltage Positive Emitter-Coupled Logic) to CML (Current-Mode Logic), as well as repeating signals from CML to CML. The device is compatible with 3.3-V, 2.5-V, or 1.8-V nominal supplies and features a fully differential internal data path to minimize noise and pulse-width distortion.
Key Specifications
| Parameter | Value |
|---|---|
| Package | 8-VSSOP, 8-TSSOP, 8-MSOP |
| Pins | 8 |
| Operating Temperature Range (°C) | -40 to 85 |
| Data Rate | Up to 1.5 Gbps |
| Input Signal | CML, LVDS, LVPECL |
| Output Signal | CML (Differential) |
| Total Jitter | < 70 ps |
| Part-To-Part Skew | < 100 ps (Max) |
| Propagation Delay Times | 800 ps (Max) |
| Supply Voltage | 3.3 V |
| Mounting Type | Surface Mount |
Key Features
- Provides level translation from LVDS or LVPECL to CML, and repeating from CML to CML.
- Signaling rates up to 1.5 Gbps.
- CML compatible output directly drives devices with 3.3-V, 2.5-V, or 1.8-V supplies.
- Total jitter < 70 ps and low part-to-part skew < 100 ps (Max).
- Wide common-mode receiver capability allows direct coupling of input signals.
- Receiver input threshold hysteresis of 25 mV over 0-V to 4-V common-mode range.
- Propagation delay times of 800 ps (Max).
- Available in SOIC and MSOP packages.
Applications
- Level Translation
- 622-MHz Central Office Clock Distribution
- High-Speed Network Routing
- Wireless Basestations
- Low Jitter Clock Repeater
Q & A
- What is the maximum signaling rate of the SN65CML100DGKR?
The maximum signaling rate is up to 1.5 Gbps.
- What types of input signals does the SN65CML100DGKR support?
The device supports CML, LVDS, and LVPECL input signals.
- What is the operating temperature range of the SN65CML100DGKR?
The operating temperature range is from -40°C to 85°C.
- What are the compatible output supply voltages for the SN65CML100DGKR?
The output is compatible with 3.3-V, 2.5-V, or 1.8-V nominal supplies.
- What is the total jitter specification for the SN65CML100DGKR?
The total jitter is less than 70 ps.
- What is the part-to-part skew specification for the SN65CML100DGKR?
The part-to-part skew is less than 100 ps (Max).
- What is the propagation delay time for the SN65CML100DGKR?
The propagation delay time is 800 ps (Max).
- What types of packages are available for the SN65CML100DGKR?
The device is available in 8-VSSOP, 8-TSSOP, and 8-MSOP packages.
- What are some common applications for the SN65CML100DGKR?
Common applications include level translation, high-speed network routing, wireless basestations, and low jitter clock repeaters.
- How does the SN65CML100DGKR handle single-ended LVPECL input?
For single-ended LVPECL input operation, the unused differential input is connected to VBB as a switching reference voltage. VBB should be decoupled with a 0.01-uF capacitor and the current sourcing or sinking limited to 400 uA.
