Overview
The CDCM61004RHBR, produced by Texas Instruments, is a highly versatile and low-jitter clock generator designed for high-end data communication applications. This device is a four-output integrated VCO (Voltage-Controlled Oscillator) clock synthesizer that supports multiple output formats, including LVPECL (Low-Voltage Positive Emitter-Coupled Logic), LVDS (Low-Voltage Differential Signaling), and LVCMOS (Low-Voltage Complementary Metal-Oxide-Semiconductor). It operates from a low-frequency crystal or LVCMOS input and can generate a wide range of output frequencies, making it suitable for applications such as SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV.
Key Specifications
| Parameter | Min | Max | Unit | |
|---|---|---|---|---|
| Supply Voltage (VCC) | -0.5 | 4.6 | V | |
| Input Frequency Range | 21.875 MHz | 28.47 MHz | MHz | |
| Output Frequency Range | 43.75 MHz | 683.264 MHz | MHz | |
| Random Jitter (LVPECL, 10 kHz to 20 MHz) | 0.509 ps | ps, RMS | ||
| Output Duty Cycle | 45% | 55% | % | |
| Output Skew (LVPECL) | 30 ps | ps | ||
| Operating Temperature Range | -40°C | 85°C | °C | |
| Package Type | 32-pin VQFN | |||
| Package Size | 5.00 mm × 5.00 mm | mm |
Key Features
- Four universal output buffers configurable as LVPECL, LVDS, or LVCMOS.
- LVCMOS bypass output available to help with crystal loading.
- On-chip VCO operates in the 1.75 GHz to 2.05 GHz range.
- High-performance PLL core with low phase noise and random jitter.
- Output frequency selectable by /1, /2, /3, /4, /6, /8 from a single output divider.
- Supports common LVPECL/LVDS and LVCMOS output frequencies.
- Internal PLL loop bandwidth of 400 kHz.
- Low output skew and duty cycle correction to 50% (± 5%).
- Divider programming using control pins.
Applications
- High-end datacom applications including SONET, Ethernet, Fibre Channel, and Serial ATA.
- HDTV and other high-frequency communication systems.
- Cost-effective high-frequency crystal oscillator replacement.
- Wireline and data communication systems requiring low-jitter clock signals.
Q & A
- What is the CDCM61004RHBR used for?
The CDCM61004RHBR is used as a low-jitter clock generator for high-end data communication applications such as SONET, Ethernet, Fibre Channel, and HDTV.
- What output formats does the CDCM61004RHBR support?
The device supports LVPECL, LVDS, and LVCMOS output formats.
- What is the operating frequency range of the on-chip VCO?
The on-chip VCO operates in the 1.75 GHz to 2.05 GHz range.
- What is the typical random jitter performance of the CDCM61004RHBR?
The typical random jitter performance is 0.509 ps, RMS (from 10 kHz to 20 MHz) for LVPECL outputs.
- How is the output frequency selected on the CDCM61004RHBR?
The output frequency is selectable by /1, /2, /3, /4, /6, /8 from a single output divider using control pins.
- What is the package type and size of the CDCM61004RHBR?
The device is available in a 32-pin VQFN package with a size of 5.00 mm × 5.00 mm.
- What is the operating temperature range of the CDCM61004RHBR?
The device operates from -40°C to 85°C.
- Does the CDCM61004RHBR support LVCMOS bypass output?
- What is the internal PLL loop bandwidth of the CDCM61004RHBR?
The internal PLL loop bandwidth is 400 kHz.
- How is the output duty cycle corrected in the CDCM61004RHBR?
The output duty cycle is corrected to 50% (± 5%).
