Overview
The CDCM61002RHBT, produced by Texas Instruments, is a highly versatile and low-jitter clock synthesizer designed for various wireline and data communication applications. This device features an integrated voltage-controlled oscillator (VCO) and a phase-locked loop (PLL) that can be easily configured using control pins. It supports multiple output formats, including LVPECL, LVDS, and LVCMOS, making it suitable for a wide range of high-end datacom applications such as SONET, Ethernet, Fibre Channel, and HDTV.
Key Specifications
Parameter | Value | Unit |
---|---|---|
Package Type | 32-pin QFN (RHB) | |
Operating Temperature Range | –40°C to +85°C | |
Input Frequency Range | 21.875 MHz to 28.47 MHz | |
Output Frequency Range | 43.75 MHz to 683.264 MHz | |
VCO Frequency Range | 1.75 GHz to 2.05 GHz | |
PLL Loop Bandwidth | 400 kHz | |
Random Jitter (RMS) | Typically 0.509 ps (10 kHz to 20 MHz) | |
Phase Noise | Typically –146 dBc/Hz at 5-MHz Offset for 625-MHz LVPECL Output | |
Output Duty Cycle | 50% (± 5%) | |
Output Skew (LVPECL) | 20 ps | |
Power Supply | 3.3 V | |
ESD Protection | Exceeds 2 kV (HBM) |
Key Features
- Two universal output buffers configurable as LVPECL, LVDS, or LVCMOS
- On-chip VCO and PLL for low-jitter clock generation
- Divider programming using control pins for prescaler, feedback, and output dividers
- Chip enable control pin and reset functionality
- LVCMOS bypass output available
- Low output skew and high output duty cycle accuracy
- ESD protection exceeding 2 kV (HBM)
- Small 5-mm × 5-mm QFN package
Applications
- High-end datacom applications such as SONET, Ethernet, and Fibre Channel
- Serial ATA and HDTV
- Cost-effective replacement for high-frequency crystal oscillators
- Wireline and data communication systems requiring low-jitter clock signals
Q & A
- What is the CDCM61002RHBT used for? The CDCM61002RHBT is used as a low-jitter clock synthesizer for various wireline and data communication applications.
- What are the supported output formats? The device supports LVPECL, LVDS, and LVCMOS output formats.
- What is the operating temperature range of the CDCM61002RHBT? The operating temperature range is from –40°C to +85°C.
- What is the input frequency range of the CDCM61002RHBT? The input frequency range is from 21.875 MHz to 28.47 MHz.
- How is the PLL configured in the CDCM61002RHBT? The PLL is configured using control pins for prescaler, feedback, and output dividers.
- What is the typical random jitter performance of the CDCM61002RHBT? The typical random jitter performance is 0.509 ps (RMS) from 10 kHz to 20 MHz.
- What is the phase noise performance of the CDCM61002RHBT? The phase noise is typically –146 dBc/Hz at a 5-MHz offset for a 625-MHz LVPECL output.
- Does the CDCM61002RHBT have ESD protection? Yes, it exceeds 2 kV (HBM) for ESD protection.
- What is the package type and size of the CDCM61002RHBT? The package type is a 32-pin QFN (RHB) and the size is 5-mm × 5-mm.
- What are some common applications of the CDCM61002RHBT? Common applications include SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV.