Overview
The CD40109BPWRE4 is a low-to-high-voltage level-shifting circuit produced by Texas Instruments. This component is part of the CD40109B series and is designed to shift low-voltage digital-logic input signals to higher-voltage output signals. It features four independent level-shifting circuits, each capable of handling inputs and outputs with different voltage levels.
The device is notable for its flexibility in power supply sequencing, allowing the low-voltage supply (VCC) and input signals to be applied before the high-voltage supply (VDD), with no restrictions on the relative magnitudes of the supply voltages and input signals within the device's maximum ratings.
Key Specifications
| Parameter | Value |
|---|---|
| Package Type | TSSOP (PW) |
| Pins | 16 |
| Operating Temperature Range (°C) | -55 to 125 |
| Package Quantity | 2000 (Reel), 90 (Tube) |
| Maximum Input Current | 1 μA at 18 V (full package-temperature range), 100 nA at 18 V and 25°C |
| Noise Margin | 1 V at VCC= 5 V, VDD= 10 V; 2 V at VCC= 10 V, VDD= 15 V |
| Output Voltage Range | -0.5 V to VDD + 0.5 V |
| RoHS Compliance | Yes, Green (RoHS & no Sb/Br) |
Key Features
- Independence of power supply sequence considerations: VCC can exceed VDD, and input signals can exceed both VCC and VDD.
- Up and down level-shifting capability.
- Three-state outputs with separate enable controls.
- Standardized, symmetrical output characteristics.
- 100% tested for quiescent current at 20 V.
- Meets all requirements of JEDEC Tentative Standard No. 13B, 'Standard Specifications for Description of 'B' Series CMOS Devices'.
Applications
- High-or-low level-shifting with three-state outputs for unidirectional or bidirectional bussing.
- Isolation of logic subsystems using separate power supplies from supply sequencing, supply loss, and supply regulation considerations.
Q & A
- What is the primary function of the CD40109BPWRE4?
The primary function is to shift low-voltage digital-logic input signals to higher-voltage output signals.
- What are the key advantages of the CD40109BPWRE4 in terms of power supply sequencing?
The device allows VCC and input signals to be applied before VDD, with no restrictions on the relative magnitudes of the supply voltages and input signals within the device's maximum ratings.
- What types of packages are available for the CD40109B series?
The CD40109B series is available in 16-lead ceramic dual-in-line packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
- What is the operating temperature range of the CD40109BPWRE4?
The operating temperature range is -55°C to 125°C.
- Does the CD40109BPWRE4 meet any specific industry standards?
Yes, it meets all requirements of JEDEC Tentative Standard No. 13B, 'Standard Specifications for Description of 'B' Series CMOS Devices'.
- What is the maximum input current for the CD40109BPWRE4?
The maximum input current is 1 μA at 18 V over the full package-temperature range and 100 nA at 18 V and 25°C.
- What is the noise margin for the CD40109BPWRE4?
The noise margin is 1 V at VCC= 5 V, VDD= 10 V, and 2 V at VCC= 10 V, VDD= 15 V.
- Is the CD40109BPWRE4 RoHS compliant?
Yes, it is RoHS compliant and also meets the Green (RoHS & no Sb/Br) standards.
- What are the typical applications of the CD40109BPWRE4?
Typical applications include high-or-low level-shifting with three-state outputs for unidirectional or bidirectional bussing and isolation of logic subsystems using separate power supplies.
- Does the CD40109BPWRE4 have three-state output capability?
Yes, it features three-state outputs with separate enable controls.
