Overview
The SPC560P40L1CEFBR is a 32-bit Power Architecture microcontroller (MCU) designed by STMicroelectronics, specifically tailored for automotive applications such as engine management, chassis control, safety systems, body control, and advanced driver assistance systems. This MCU is part of the SPC560P series, which integrates a range of innovative peripherals to enhance efficiency and performance in automotive electronics.
Key Specifications
| Specification | Details |
|---|---|
| CPU Core | Up to 64 MHz, single issue, 32-bit e200z0h core |
| Memory | Up to 256 KB on-chip code flash memory with ECC, 64 KB on-chip data flash memory with ECC, and up to 20 KB on-chip SRAM with ECC |
| Communication Interfaces | 2 LINFlex channels (1× Master/Slave, 1× Master only), up to 3 DSPI channels, up to 2 FlexCAN interfaces (2.0B Active), and 1 safety port based on FlexCAN |
| Analog-to-Digital Converter (ADC) | 10-bit ADC with up to 16 input channels, conversion time < 1 µs including sampling time at full precision |
| General Purpose I/Os | Individually programmable as input, output or special function; 37 on LQFP64 and 64 on LQFP100 |
| Timers and Counters | 1 general purpose eTimer unit with 6 timers each with up/down capabilities, 16-bit resolution, and quadrature decode with rotation direction flag |
| Package | LQFP64 (10 x 10 x 1.4 mm) and LQFP100 (14 x 14 x 1.4 mm) |
Key Features
- High-performance e200z0 core processor with Variable Length Encoding (VLE)
- Fail-safe protection including programmable watchdog timer, non-maskable interrupt, and fault collection unit
- Nexus Class 1 interface for debugging and development
- 16-channel eDMA controller and 16 priority level interrupt controller
- Up to 25 external interrupts and four 32-bit timers implemented by PIT
- FlexPWM unit with 8 complementary or independent outputs and ADC synchronization signals
- On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM)
Applications
The SPC560P40L1CEFBR is designed for various automotive applications, including:
- Engine management systems
- Chassis control systems
- Safety systems such as airbag control and anti-lock braking systems (ABS)
- Body control modules (BCM) for managing vehicle body functions
- Advanced driver assistance systems (ADAS)
Q & A
- What is the CPU core frequency of the SPC560P40L1CEFBR?
The CPU core frequency is up to 64 MHz.
- How much flash memory does the SPC560P40L1CEFBR have?
The MCU has up to 256 KB on-chip code flash memory with ECC.
- What communication interfaces are available on the SPC560P40L1CEFBR?
The MCU features 2 LINFlex channels, up to 3 DSPI channels, up to 2 FlexCAN interfaces, and 1 safety port based on FlexCAN.
- What is the resolution of the analog-to-digital converter (ADC) on the SPC560P40L1CEFBR?
The ADC has a 10-bit resolution.
- How many general purpose I/Os are available on the LQFP100 package?
There are 64 general purpose I/Os available on the LQFP100 package.
- What is the purpose of the Nexus Class 1 interface on the SPC560P40L1CEFBR?
The Nexus Class 1 interface is used for debugging and development.
- Does the SPC560P40L1CEFBR have fail-safe protection features?
Yes, it includes a programmable watchdog timer, non-maskable interrupt, and fault collection unit.
- What types of timers are available on the SPC560P40L1CEFBR?
The MCU features four 32-bit timers implemented by PIT and a general purpose eTimer unit with up/down capabilities.
- Can the SPC560P40L1CEFBR be used in advanced driver assistance systems (ADAS)?
Yes, it is suitable for use in ADAS applications.
- What package options are available for the SPC560P40L1CEFBR?
The MCU is available in LQFP64 (10 x 10 x 1.4 mm) and LQFP100 (14 x 14 x 1.4 mm) packages.
