Overview
The L6562D, produced by STMicroelectronics, is a current-mode Power Factor Correction (PFC) controller operating in Transition Mode (TM). It is designed to improve performance over its predecessor, the L6561, and is pin-to-pin compatible with it. The L6562D is realized in BCD (Bipolar-CMOS-DMOS) technology and features a proprietary multiplier design that minimizes the Total Harmonic Distortion (THD) of the AC input current. This component is particularly suited for applications requiring high power factor and low THD, such as IEC61000-3-2 compliant Switch-Mode Power Supplies (SMPS) up to 300W.
Key Specifications
| Parameter | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|
| IC Supply Voltage (VCC) | 10.3 | - | 22 | V |
| Start-up Current | - | - | ≤70 µA | A |
| Quiescent Current | - | - | ≤4 mA | A |
| Internal Reference Voltage | 2.465 | 2.5 | 2.535 | V |
| Gate Driver Output Current | - | - | 600 mA (source), 800 mA (sink) | A |
| Junction Temperature Range | -40 | - | 150 | °C |
| Storage Temperature Range | -55 | - | 150 | °C |
Key Features
- Transition-Mode control of PFC pre-regulators
- Proprietary multiplier design for minimum THD of AC input current
- Very precise adjustable output overvoltage protection
- Ultra-low start-up current (≤70 µA) and low quiescent current (≤4 mA)
- Extended IC supply voltage range (10.3 V to 22 V)
- On-chip filter on current sense
- Disable function for remote ON/OFF control
- 1% (@ Tj = 25 °C) internal reference voltage
- Totem-pole gate driver with UVLO pull-down and voltage clamp
- THD optimizer circuit to reduce conduction dead-angle near line voltage zero-crossings
Applications
- PFC pre-regulators for IEC61000-3-2 compliant SMPS (TV, desktop PC, monitor) up to 300W
- High-end AC-DC adapters/chargers
- Entry-level server and web server power supplies
Q & A
- What is the primary function of the L6562D?
The L6562D is a current-mode Power Factor Correction (PFC) controller operating in Transition Mode (TM).
- What are the key benefits of the proprietary multiplier design in the L6562D?
The proprietary multiplier design minimizes the Total Harmonic Distortion (THD) of the AC input current, allowing for wide-range-mains operation with extremely low THD.
- What is the start-up current of the L6562D?
The start-up current of the L6562D is ≤70 µA.
- What is the quiescent current of the L6562D?
The quiescent current of the L6562D is ≤4 mA.
- What is the internal reference voltage accuracy of the L6562D?
The internal reference voltage accuracy is 1% at Tj = 25 °C.
- What is the gate driver output current capability of the L6562D?
The gate driver output can source up to 600 mA and sink up to 800 mA.
- What is the junction temperature range of the L6562D?
The junction temperature range is -40 °C to 150 °C.
- What are the typical applications of the L6562D?
Typical applications include PFC pre-regulators for IEC61000-3-2 compliant SMPS, high-end AC-DC adapters/chargers, and entry-level server and web server power supplies.
- How does the THD optimizer circuit in the L6562D work?
The THD optimizer circuit reduces the conduction dead-angle near line voltage zero-crossings by artificially increasing the ON-time of the power switch, thus minimizing the time interval where energy transfer is lacking and fully discharging the high-frequency filter capacitor.
- What are the package options for the L6562D?
The L6562D is available in DIP-8 and SO-8 packages.
