Overview
The NCH-RSL10-101WC51-ABG, produced by onsemi, is an ultra-low-power, highly flexible multi-protocol 2.4 GHz radio System-on-Chip (SoC) designed for high-performance wearable and medical applications. It integrates an Arm Cortex-M3 processor and an LPDSP32 DSP core, supporting Bluetooth Low Energy technology and 2.4 GHz proprietary protocol stacks without compromising power consumption.
Key Specifications
| Description | Symbol | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Supply Voltage | VDDO | 1.1 | 1.25 | 3.3 | V |
| Current Consumption (RX Mode, 1 Mbps) | IBATRFRX | 5.6 | mA | ||
| Current Consumption (TX Mode, 0 dBm) | IBATRFTX | 8.9 | mA | ||
| Deep Sleep Current (IO Wake-up) | Ids1 | 50 | nA | ||
| Deep Sleep Current (8 kB RAM Retention) | Ids3 | 300 | nA | ||
| RX Sensitivity (1 Mbps, BLE) | -94 | dBm | |||
| Data Rate | 62.5 | 2000 | kbps | ||
| Transmit Power | -17 | +6 | dBm | ||
| Number of Pins | 51 | Pins |
Key Features
- Arm Cortex-M3 Processor: A 32-bit core for real-time applications, enabling high-performance low-cost platforms.
- LPDSP32 DSP Core: A 32-bit Dual Harvard DSP core supporting audio codecs for wireless audio communication.
- Radio Frequency Front-End: Based on a 2.4 GHz RF transceiver, implementing the physical layer of Bluetooth Low Energy technology and other proprietary protocols.
- Protocol Baseband Hardware: Bluetooth 5.2 certified with support for a 2 Mbps RF link and custom protocol options.
- Highly-Integrated SoC: Includes high-efficiency power management units, oscillators, flash and RAM memories, a DMA controller, and various peripherals and interfaces.
- Deep Sleep Mode: Various configurations available, including IO wake-up and 8 kB RAM retention.
- Flexible Supply Voltage: Integrates high-efficiency power regulators with a VBAT range of 1.1 to 3.3 V.
- Highly Configurable Interfaces: Supports I2C, UART, two SPI interfaces, PCM interface, multiple GPIOs, digital microphone interface (DMIC), and output driver (OD).
- Audio Signal Processing: Includes an Asynchronous Sample Rate Converter (ASRC) and Audio Sink Clock Blocks for audio synchronization.
- Flexible Clocking Scheme: Must be clocked from the XTAL/PLL of the radio front-end at 48 MHz.
- Security Features: Includes secure algorithms and code protection with authenticated debug port access (JTAG ‘lock’).
Applications
- Wearable Devices: Ideal for fitness trackers, smartwatches, and other wearable technology due to its ultra-low power consumption.
- Medical Devices: Suitable for medical applications such as health monitors and portable diagnostic devices.
- Industrial and Automotive Applications: Used in low-power wireless connectivity solutions for industrial and automotive sectors.
- Audio Streaming Devices: Supports audio signal streaming with low power consumption, making it suitable for wireless audio devices.
Q & A
- What is the primary application of the NCH-RSL10-101WC51-ABG SoC?
The primary application is in high-performance wearable and medical devices.
- What processor does the RSL10 SoC use?
The RSL10 SoC uses an Arm Cortex-M3 processor.
- What is the power consumption in deep sleep mode with IO wake-up?
The power consumption in deep sleep mode with IO wake-up is approximately 50 nA.
- What is the maximum supply voltage for the RSL10 SoC?
The maximum supply voltage is 3.3 V.
- Does the RSL10 support firmware over-the-air (FOTA) updates?
Yes, the RSL10 supports FOTA updates.
- What is the RX sensitivity at 1 Mbps for Bluetooth Low Energy mode?
The RX sensitivity at 1 Mbps for Bluetooth Low Energy mode is -94 dBm.
- What are the supported data rates for the RSL10 SoC?
The supported data rates range from 62.5 kbps to 2000 kbps.
- What is the transmit power range of the RSL10 SoC?
The transmit power range is from -17 dBm to +6 dBm.
- Does the RSL10 SoC support multiple interfaces?
Yes, it supports I2C, UART, two SPI interfaces, PCM interface, multiple GPIOs, DMIC, and OD.
- Is the RSL10 SoC RoHS compliant?
Yes, the RSL10 SoC is RoHS compliant.
