Overview
The UJA1168TK/FDJ, produced by NXP USA Inc., is a mini high-speed CAN (Controller Area Network) System Basis Chip (SBC) designed for advanced automotive and industrial applications. This chip integrates an ISO 11898-2/5/6 compliant HS-CAN transceiver and a fully integrated 5 V/100 mA low-drop voltage regulator for supplying a microcontroller. It also features a watchdog, a Serial Peripheral Interface (SPI), and various power management modes to optimize energy efficiency.
Key Specifications
| Parameter | Description |
|---|---|
| Package | 14-HVSON (3x4.5 mm) |
| Operating Temperature | -40°C to 150°C |
| Voltage Regulator | 5 V / 100 mA for microcontroller supply |
| CAN Compliance | ISO 11898-2, ISO 11898-5, and ISO 11898-6 |
| Communication Speed | Up to 2 Mbit/s in CAN FD fast phase |
| Watchdog | Window, Timeout, and Autonomous modes; watchdog period selectable between 8 ms and 4 s |
| SPI Interface | 16-, 24-, and 32-bit SPI for configuration, control, and diagnosis |
| Power Modes | Normal, Standby, Sleep, Reset, Forced Normal, Overtemp, and Off |
| Wake-Up Capability | Bus and local wake-up; optional cyclic wake-up in watchdog Timeout mode |
| High-Voltage Output | INH for controlling external voltage regulators (UJA1168TK and UJA1168TK/FDJ only) |
| Sensor Supply Voltage | VEXT for sensor supply (UJA1168TK/VX and UJA1168TK/VX/FDJ only) |
Key Features
- ISO 11898-2, ISO 11898-5, and ISO 11898-6 compliant high-speed CAN transceiver
- Loop delay symmetry timing for reliable communication up to 2 Mbit/s in CAN FD fast phase
- Autonomous bus biasing according to ISO 11898-6
- Fully integrated 5 V/100 mA low-drop voltage regulator for microcontroller supply
- Bus connections are truly floating when power to pin BAT is off
- No ‘false’ wake-ups due to CAN FD frame detection in UJA1168TK/FD and UJA1168TK/VX/FD versions
- High-voltage output (INH) for controlling external voltage regulators
- Sensor supply voltage (VEXT) for sensor supply in UJA1168TK/VX and UJA1168TK/VX/FD versions
- Mode control via Serial Peripheral Interface (SPI)
- Overtemperature warning and shutdown
- Watchdog with independent clock source and various operating modes
- Supports remote flash programming via the CAN bus
Applications
The UJA1168TK/FDJ is designed for use in various automotive and industrial applications, including:
- Automotive networking systems requiring high-speed CAN communication
- Industrial control systems that need reliable and efficient communication protocols
- Embedded systems requiring low power consumption and advanced power management features
- Vehicles with advanced driver-assistance systems (ADAS) and autonomous driving capabilities
- Industrial automation and IoT devices
Q & A
- What is the UJA1168TK/FDJ?
The UJA1168TK/FDJ is a mini high-speed CAN System Basis Chip (SBC) produced by NXP USA Inc., integrating an ISO 11898-2/5/6 compliant HS-CAN transceiver and a 5 V/100 mA voltage regulator.
- What are the key features of the UJA1168TK/FDJ?
Key features include ISO 11898-2/5/6 compliance, loop delay symmetry timing, autonomous bus biasing, a fully integrated 5 V/100 mA voltage regulator, and advanced power management modes.
- What are the different operating modes of the UJA1168TK/FDJ?
The chip supports Normal, Standby, Sleep, Reset, Forced Normal, Overtemp, and Off operating modes.
- How does the watchdog function in the UJA1168TK/FDJ?
The watchdog operates in Window, Timeout, and Autonomous modes with a period selectable between 8 ms and 4 s. It also supports optional cyclic wake-up in watchdog Timeout mode.
- What is the purpose of the INH and VEXT pins in the UJA1168TK/FDJ?
The INH pin is used for controlling external voltage regulators, while the VEXT pin provides a sensor supply voltage in certain versions.
- Can the UJA1168TK/FDJ support remote flash programming?
- What is the communication speed of the UJA1168TK/FDJ in CAN FD fast phase?
The communication speed can reach up to 2 Mbit/s in CAN FD fast phase.
- What are the power consumption characteristics of the UJA1168TK/FDJ?
The chip has low-current Standby and Sleep modes with bus and local wake-up capability, making it energy-efficient.
- What is the significance of the SPI interface in the UJA1168TK/FDJ?
The SPI interface allows for configuration, control, and diagnosis of the chip, supporting 16-, 24-, and 32-bit operations.
- In what types of applications is the UJA1168TK/FDJ typically used?
- What is the operating temperature range of the UJA1168TK/FDJ?
