74AUP1G373GW,125
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Nexperia USA Inc. 74AUP1G373GW,125

Manufacturer No:
74AUP1G373GW,125
Manufacturer:
Nexperia USA Inc.
Package:
Tape & Reel (TR)
Description:
IC LATCH D-TYPE 6TSSOP
Delivery:
Payment:
iso14001
iso45001
iso9001
iso13485

Product Introduction

Overview

The 74AUP1G373GW,125 is a low-power D-type transparent latch with a 3-state output, manufactured by Nexperia USA Inc. This device is designed to operate within a wide supply voltage range from 0.8 V to 3.6 V, making it versatile for various applications. The latch features Schmitt-trigger action at all inputs, which enhances noise immunity and tolerance to slower input rise and fall times. It is fully specified for partial power-down applications using IOFF circuitry, preventing backflow current when powered down.

Key Specifications

Parameter Value Unit
VCC Range 0.8 - 3.6 V
Logic Switching Levels CMOS
Output Drive Capability 1.9 / -1.9 mA
Propagation Delay (tpd) 8.5 ns
Static Power Consumption (ICC) 0.9 μA (maximum) μA
Operating Temperature Range (Tamb) -40 to +125 °C
Package Type TSSOP6 (SOT363-2)

Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • High noise immunity due to Schmitt-trigger action at all inputs
  • CMOS low power dissipation
  • Low static power consumption (ICC = 0.9 μA maximum)
  • Overvoltage tolerant inputs up to 3.6 V
  • Low noise overshoot and undershoot (< 10% of VCC)
  • IOFF circuitry for partial power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Applications

The 74AUP1G373GW,125 finds applications across various industries, including:

  • Automotive
  • Industrial
  • Power management
  • Computing
  • Consumer electronics
  • Mobile devices
  • Wearables

Q & A

  1. What is the supply voltage range of the 74AUP1G373GW,125?

    The supply voltage range is from 0.8 V to 3.6 V.

  2. What type of logic switching levels does this device use?

    The device uses CMOS logic switching levels.

  3. What is the maximum static power consumption of this device?

    The maximum static power consumption is 0.9 μA.

  4. Does the device have any special input protection features?

    Yes, it has overvoltage tolerant inputs up to 3.6 V and Schmitt-trigger action for high noise immunity.

  5. What is the purpose of the IOFF circuitry in this device?

    The IOFF circuitry provides partial power-down mode operation, preventing backflow current when the device is powered down.

  6. What is the operating temperature range of the 74AUP1G373GW,125?

    The operating temperature range is from -40°C to +125°C.

  7. What package type is the 74AUP1G373GW,125 available in?

    The device is available in a TSSOP6 (SOT363-2) package.

  8. Is the device compliant with any specific standards?

    Yes, it complies with JEDEC standards such as JESD8-12 and JESD8-11.

  9. What is the propagation delay (tpd) of the device?

    The propagation delay is approximately 8.5 ns.

  10. How does the device handle latch-up conditions?

    The device's latch-up performance exceeds 100 mA per JESD 78 Class II Level B.

Product Attributes

Logic Type:D-Type Transparent Latch
Circuit:1:1
Output Type:Tri-State
Voltage - Supply:0.8V ~ 3.6V
Independent Circuits:1
Delay Time - Propagation:2.5ns
Current - Output High, Low:4mA, 4mA
Operating Temperature:-40°C ~ 125°C
Mounting Type:Surface Mount
Package / Case:6-TSSOP, SC-88, SOT-363
Supplier Device Package:6-TSSOP
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