Overview
The ADSP-21065LKS-240, produced by Analog Devices Inc., is a general-purpose, programmable 32-bit Digital Signal Processor (DSP) that belongs to the SHARC family. This processor is optimized for cost-sensitive applications while maintaining high performance and memory integration. It supports both fixed-point and floating-point arithmetic, making it versatile for a wide range of applications. The ADSP-21065L is fabricated in a high-speed, low-power CMOS process and features an on-chip instruction cache, allowing every instruction to be executed in a single cycle.
Key Specifications
| Specification | Value |
|---|---|
| Instruction Rate | 60 MHz or 66 MHz |
| Performance | 198 MFLOPS (32-bit floating-point) |
| On-chip Memory | 16K 32-bit Dual-ported on-chip memory (544 KBits configurable) |
| External Address Space | 64M x 32-bit word |
| SDRAM Interface | Glueless SDRAM interface |
| Serial Ports | 2 serial transmit/receive ports supporting 32-channel TDM |
| Timers | Two timers with event capture and PWM options |
| I/O Pins | 12 programmable I/O pins |
| DMA Channels | 10 DMA channels |
| Operating Voltage | 3.3V |
| Temperature Range | 0°C to +85°C (commercial), -55°C to +110°C (extended) |
| Package Options | 196-Ball CSPBGA (15mm x 15mm x 1.7mm), 208-Lead MQFP (28mm x 28mm x 3.4mm) |
Key Features
- High-performance 32-bit DSP core with IEEE 32-bit single-precision floating-point, extended precision 40-bit floating-point, and 32-bit fixed-point data formats.
- Independent, parallel computation units including an arithmetic/logic unit (ALU), multiplier, and shifter, all performing single-cycle instructions.
- Dual-ported on-chip memory allowing single-cycle, independent accesses by the core processor and I/O processor or DMA controller.
- Glueless SDRAM interface and support for multiprocessing with up to two ADSP-21065Ls.
- Two serial transmit/receive ports with support for 32-channel Time Division Multiplexing (TDM) and optional m-law or A-law companding.
- Two programmable timers with event capture and PWM options.
- 12 programmable I/O pins and 10 DMA channels.
- Code compatibility with ADI's SHARC DSP family, ensuring access to a wide range of software and hardware development tools.
Applications
The ADSP-21065LKS-240 is suitable for a broad range of applications, including:
- Consumer electronics
- Communications systems
- Automotive systems
- Industrial control systems
- Computer peripherals
- Defense and aerospace applications, adhering to AQEC standards.
- Digital audio applications, leveraging its high-performance floating-point capabilities.
Q & A
- What is the instruction rate of the ADSP-21065LKS-240?
The ADSP-21065LKS-240 operates at instruction rates of either 60 MHz or 66 MHz.
- What type of arithmetic does the ADSP-21065L support?
The ADSP-21065L supports both fixed-point and floating-point arithmetic.
- How much on-chip memory does the ADSP-21065L have?
The ADSP-21065L has 16K 32-bit dual-ported on-chip memory, which is configurable to 544 KBits.
- What is the external address space of the ADSP-21065L?
The external address space is 64M x 32-bit word.
- Does the ADSP-21065L support multiprocessing?
- What are the key features of the serial ports on the ADSP-21065L?
The serial ports support 32-channel TDM, optional m-law or A-law companding, and selectable synchronization and transmit modes.
- How many DMA channels does the ADSP-21065L have?
The ADSP-21065L has 10 DMA channels.
- What are the operating voltage and temperature ranges for the ADSP-21065L?
The operating voltage is 3.3V, and the temperature range is 0°C to +85°C (commercial) or -55°C to +110°C (extended).
- Is the ADSP-21065L suitable for defense and aerospace applications?
- What development tools are available for the ADSP-21065L?
The ADSP-21065L is code compatible with ADI's SHARC DSP family, providing access to a wide range of software and hardware development tools from ADI and third parties.
