Overview
The ADSP-21061KS-200, produced by Analog Devices Inc., is a member of the powerful SHARC (Super Harvard Architecture Computer) family of floating-point processors. This 32-bit processor is optimized for high-performance digital signal processing (DSP) applications. It combines the ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I/O processor, forming a complete system-on-a-chip. Fabricated in a high-speed, low-power CMOS process, the ADSP-21061 operates at 50 MHz with a 20 ns instruction cycle time, achieving 150 MFLOPS peak performance.
Key Specifications
| Specification | Details |
|---|---|
| Processor Core | 50 MHz SISD SHARC Core |
| Peak Performance | 150 MFLOPS |
| Instruction Cycle Time | 20 ns |
| Math Support | IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math |
| On-chip Memory | 1 Mbit dual-ported SRAM |
| I/O Interfaces | Two synchronous serial ports, Host Processor Interface, DMA controller, parallel bus connectivity |
| Power Supply | 5 V (ADSP-21061), 3.3 V (ADSP-21061L) |
| Package | Varying packages, including the KS-200 package |
Key Features
- High-Performance DSP Core: The ADSP-21061 features a high-performance 32-bit DSP core optimized for signal processing tasks.
- Integrated System Features: Includes on-chip SRAM, host processor interface, DMA controller, serial ports, and parallel bus connectivity for glueless DSP multiprocessing.
- Code Compatibility: Code compatible with all SHARC processors, ensuring ease of migration and development.
- Mathematical Capabilities: Supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math.
- Low Power Consumption: Fabricated in a high-speed, low-power CMOS process.
- Instruction Cache: On-chip instruction cache allows for single-cycle instruction execution.
Applications
- Audio Processing: Suitable for high-quality audio processing applications due to its high-performance floating-point capabilities.
- Image Processing: Ideal for image processing tasks requiring intensive computational power.
- Radar and Sonar Systems: Used in radar and sonar systems for real-time signal processing.
- Medical Imaging: Applied in medical imaging technologies such as MRI and CT scanners.
- Industrial Automation: Utilized in industrial automation for control and monitoring systems.
Q & A
- What is the ADSP-21061KS-200 processor core frequency?
The ADSP-21061KS-200 operates at a core frequency of 50 MHz.
- What is the peak performance of the ADSP-21061KS-200?
The peak performance is 150 MFLOPS.
- What type of math does the ADSP-21061KS-200 support?
It supports IEEE-compatible 32-bit floating-point, 40-bit floating point, and 32-bit fixed point math.
- How much on-chip SRAM does the ADSP-21061KS-200 have?
The ADSP-21061KS-200 has 1 Mbit of dual-ported on-chip SRAM.
- What are the key I/O interfaces of the ADSP-21061KS-200?
The key I/O interfaces include two synchronous serial ports, a host processor interface, a DMA controller, and parallel bus connectivity.
- Is the ADSP-21061KS-200 code compatible with other SHARC processors?
- What is the instruction cycle time of the ADSP-21061KS-200?
The instruction cycle time is 20 ns.
- What are some typical applications of the ADSP-21061KS-200?
Typical applications include audio processing, image processing, radar and sonar systems, medical imaging, and industrial automation.
- Does the ADSP-21061KS-200 have an on-chip instruction cache?
- What is the power supply voltage for the ADSP-21061KS-200?
The power supply voltage is 5 V for the ADSP-21061 and 3.3 V for the ADSP-21061L.
