Overview
The AD9777BSV from Analog Devices Inc. is a 16-bit, high-speed dual Interpolating TxDAC+® digital-to-analog converter. It is part of a pin-compatible family of converters and is designed for applications requiring high dynamic range and multicarrier capabilities. The AD9777 features advanced interpolation and modulation capabilities, making it ideal for wideband CDMA, multicarrier CDMA, multicarrier TDMA, and high-performance systems employing high-order QAM modulation schemes.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Number of Bits | 16 | |||
| Maximum Input Data Rate | 160 | MSPS | ||
| Maximum DAC Update Rate | 400 | MSPS (8x interpolation) | ||
| Interpolation Rate | 2x | 4x | 8x | |
| Digital Supply Voltage (DVDD) | 3.1 | 3.3 | 3.5 | V |
| Analog Supply Voltage (AVDD) | 3.1 | 3.3 | 3.5 | V |
| Power Dissipation | 380-410 | 1.2 | mW / W | |
| Operating Temperature | -40 | 85 | °C | |
| Package | 80-Lead TQFP (12mm x 12mm) | |||
| Logic 1 Voltage | 2.1 | 3 | V | |
| Logic 0 Voltage | 0 | 0.9 | V | |
| Input Capacitance | 5 | pF |
Key Features
- High-speed dual Interpolating TxDAC+® converter with a maximum input data rate of 160 MSPS and a maximum DAC update rate of 400 MSPS (8x interpolation).
- Selectable interpolation rates of 2x, 4x, and 8x.
- Complex modulator capable of mixing at Fs/2, Fs/4, or Fs/8.
- Supports direct IF mode for synthesizing intermediate frequencies (IFs) above 70 MHz.
- Internal PLL clock multiplier and programmable divider for flexible clock generation.
- Dual high-performance DAC outputs with differential current output programmable over a 2 mA to 20 mA range.
- User-accessible gain and offset correction through a 3- or 4-wire SPI interface.
- Manufactured on an advanced 0.35 micron CMOS process.
Applications
The AD9777 is targeted at wide dynamic range, multicarrier, and multistandard systems. It is ideal for applications such as wideband CDMA, multicarrier CDMA, multicarrier TDMA, multicarrier GSM, and high-performance systems employing high-order QAM modulation schemes. The image rejection feature simplifies and reduces the number of signal band filters needed in a transmit signal chain, making it suitable for 3G and broadband spectral emission specifications.
Q & A
- What is the maximum input data rate of the AD9777? The maximum input data rate of the AD9777 is 160 MSPS.
- What are the available interpolation rates for the AD9777? The AD9777 supports interpolation rates of 2x, 4x, and 8x.
- What is the maximum DAC update rate with 8x interpolation? The maximum DAC update rate with 8x interpolation is 400 MSPS.
- What type of modulator does the AD9777 feature? The AD9777 features a complex modulator capable of mixing at Fs/2, Fs/4, or Fs/8.
- How is clock generation managed in the AD9777? The AD9777 includes an internal PLL clock multiplier and a programmable divider for flexible clock generation. It also allows the use of an external clock source.
- What is the operating voltage range for the AD9777? The AD9777 operates from a single supply of 3.1 V to 3.5 V.
- What is the power dissipation of the AD9777? The nominal power dissipation is between 380 mW and 410 mW, with a maximum of 1.2 W.
- What is the operating temperature range for the AD9777? The operating temperature range is from -40°C to 85°C.
- What type of package is the AD9777 available in? The AD9777 is available in an 80-Lead TQFP (12mm x 12mm) package.
- How is the gain and offset correction managed in the AD9777? Gain and offset correction are user-accessible through a 3- or 4-wire SPI interface.
