Overview
The AD9628BCPZRL7-105 is a high-performance, dual-channel analog-to-digital converter (ADC) produced by Analog Devices Inc. This monolithic device operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families. The AD9628 is designed for low cost, low power, and ease of use, making it suitable for a variety of applications. It utilizes a multistage differential pipeline architecture with output error correction logic to ensure 12-bit accuracy at data rates of up to 125 MSPS and guarantees no missing codes over the full operating temperature range of -40°C to +85°C.
Key Specifications
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Resolution | 12 | 12 | 12 | Bits |
| Accuracy (No Missing Codes) | Full | Guaranteed | Guaranteed | |
| Offset Error | -1.0 | -0.3 | +0.4 | mV |
| SNR | 71.2 | dBFS at 70 MHz | ||
| SFDR | 93 | dBc at 70 MHz | ||
| Power Consumption | 101 | mW/channel at 125 MSPS | ||
| Analog Input Bandwidth | 650 | MHz | ||
| Differential Analog Input | 2 | V p-p | ||
| DNL | -0.25 | +0.25 | LSB |
Key Features
- Operates from a single 1.8 V analog power supply with a separate digital output driver supply for 1.8 V CMOS or LVDS logic families.
- High-performance sample-and-hold circuit with excellent performance for input frequencies up to 200 MHz.
- On-chip voltage reference and multistage differential pipeline architecture with output error correction logic.
- Programmable clock and data alignment, and programmable digital test pattern generation including deterministic, pseudorandom, and custom user-defined patterns via SPI interface.
- Differential clock input and optional duty cycle stabilizer (DCS) to compensate for wide variations in the clock duty cycle.
- Digital output data presented in offset binary, Gray code, or twos complement format, with support for multiplexed output onto a single bus.
- Packaged in a 64-lead RoHS-compliant LFCSP, pin compatible with various other ADC models from Analog Devices.
Applications
- Communications systems
- Diversity radio systems
- Multimode digital receivers (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA).
Q & A
- What is the resolution of the AD9628 ADC?
The AD9628 has a resolution of 12 bits.
- What is the maximum sample rate of the AD9628?
The AD9628 can operate at sample rates of up to 125 MSPS.
- What are the supported output logic levels for the AD9628?
The AD9628 supports 1.8 V CMOS or LVDS output logic levels.
- Does the AD9628 have an on-chip voltage reference?
Yes, the AD9628 includes an on-chip voltage reference.
- What is the operating temperature range of the AD9628?
The AD9628 operates over the industrial temperature range of -40°C to +85°C.
- What types of digital test patterns can be generated by the AD9628?
The AD9628 can generate built-in deterministic and pseudorandom patterns, as well as custom user-defined test patterns via the SPI interface.
- What is the power consumption of the AD9628 at 125 MSPS?
The power consumption is approximately 101 mW per channel at 125 MSPS.
- Does the AD9628 support multiplexed output?
Yes, the AD9628 supports multiplexing output data onto a single output bus.
- What is the bandwidth of the analog input of the AD9628?
The analog input bandwidth is 650 MHz.
- Is the AD9628 RoHS-compliant?
Yes, the AD9628 is packaged in a 64-lead RoHS-compliant LFCSP.
