Overview
The AD9516-3, produced by Analog Devices Inc., is a high-performance 14-output clock generator designed to provide multi-output clock distribution with exceptional subpicosecond jitter performance. It features an on-chip phase-locked loop (PLL) and a voltage-controlled oscillator (VCO) that tunes from 1.75 GHz to 2.25 GHz. Optionally, an external VCO/VCXO up to 2.4 GHz can be used. This device is optimized for low jitter and phase noise, making it ideal for applications requiring high clock precision, such as data converters, wireless infrastructure, and high-speed networking.
Key Specifications
| Parameter | Value |
|---|---|
| Package Type | 64-lead LFCSP (9mm x 9mm w/ EP) |
| Supply Voltage | 3.3 V (nominal), VCP up to 5 V for external VCO |
| Operating Temperature | -40°C to +85°C |
| VCO Frequency Range | 1.75 GHz to 2.25 GHz (on-chip), up to 2.4 GHz (external) |
| Output Types | 6 LVPECL outputs (in three pairs), 4 LVDS outputs (in two pairs), each LVDS output can be reconfigured as two CMOS outputs |
| Output Frequencies | LVPECL: up to 1.6 GHz, LVDS: up to 800 MHz, CMOS: up to 250 MHz |
| Divider Range | LVPECL: 1 to 32, LVDS/CMOS: up to 1024 |
| Jitter Performance | Additive output jitter: 225 fs rms (LVPECL), 275 fs rms (LVDS) |
| Channel-to-Channel Skew | <10 ps (paired outputs) |
Key Features
- On-chip PLL and VCO for high-frequency clock generation
- Low jitter and phase noise to maximize data converter performance
- Six LVPECL outputs (in three pairs) and four LVDS outputs (in two pairs), with each LVDS output reconfigurable as two CMOS outputs
- Programmable dividers and coarse phase delay for each output pair
- Automatic and manual reference switchover/holdover modes
- Digital or analog lock detect, selectable
- Automatic synchronization of all outputs on power-up, with manual synchronization available
Applications
- Low jitter, low phase noise clock distribution
- 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4
- Forward error correction (G.710)
- Clocking high-speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
- High-performance wireless transceivers
- ATE and high-performance instrumentation
Q & A
- What is the primary function of the AD9516-3?
The AD9516-3 is a multi-output clock generator with integrated PLL and VCO, designed for low jitter and phase noise clock distribution.
- What is the frequency range of the on-chip VCO in the AD9516-3?
The on-chip VCO tunes from 1.75 GHz to 2.25 GHz.
- Can the AD9516-3 use an external VCO/VCXO?
- What types of output signals does the AD9516-3 provide?
The AD9516-3 provides six LVPECL outputs, four LVDS outputs (each reconfigurable as two CMOS outputs), and supports LVPECL, LVDS, and CMOS references.
- What is the operating temperature range of the AD9516-3?
The AD9516-3 operates over the standard industrial range of -40°C to +85°C.
- How many pins does the AD9516-3 have?
The AD9516-3 has 64 pins in an LFCSP package.
- What is the typical supply voltage for the AD9516-3?
The typical supply voltage is 3.3 V, with the charge pump supply (VCP) optionally up to 5 V for an external VCO.
- What are the key applications of the AD9516-3?
The AD9516-3 is used in high-speed networking, wireless infrastructure, high-speed data converters, and other applications requiring low jitter and phase noise.
- Does the AD9516-3 support programmable delays and dividers?
- What is the jitter performance of the AD9516-3?
The AD9516-3 has an additive output jitter of 225 fs rms for LVPECL outputs and 275 fs rms for LVDS outputs.
