Overview
The AD9211BCPZ-300 is a 10-bit monolithic sampling analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is optimized for high performance, low power consumption, and ease of use. It operates at conversion rates of up to 300 million samples per second (MSPS) and is designed for outstanding dynamic performance in wideband carrier and broadband systems. The ADC includes all necessary functions such as a track-and-hold (T/H) and voltage reference on the chip, providing a complete signal conversion solution. It requires a 1.8 V analog voltage supply and a differential clock for full performance operation.
Key Specifications
| Parameter | Value | Unit |
|---|---|---|
| Resolution | 10-bit | |
| Conversion Rate | Up to 300 MSPS | |
| Signal-to-Noise Ratio (SNR) | 60.1 dBFS @ 300 MSPS with 70 MHz input | |
| Effective Number of Bits (ENOB) | 9.7 @ 300 MSPS (−1.0 dBFS) | |
| Spurious-Free Dynamic Range (SFDR) | −80 dBc @ 300 MSPS (−1.0 dBFS) | |
| Differential Nonlinearity (DNL) | ±0.1 LSB typical | |
| Integral Nonlinearity (INL) | ±0.2 LSB typical | |
| Analog Input Bandwidth | 700 MHz full power | |
| Output Format | LVDS (ANSI-644), twos complement, offset binary, Gray code | |
| Power Consumption | 437 mW @ 300 MSPS (LVDS SDR mode), 410 mW @ 300 MSPS (LVDS DDR mode) | |
| Supply Voltage | 1.8 V analog and digital | |
| Package | 56-Lead LFCSP (8mm x 8mm w/ EP) | |
| Operating Temperature Range | −40°C to +85°C |
Key Features
- High performance with 60.1 dBFS SNR @ 300 MSPS with a 70 MHz input.
- Low power consumption of 410 mW @ 300 MSPS.
- Ease of use with LVDS output data and output clock signal, allowing interface to current FPGA technology.
- On-chip reference and sample-and-hold for flexibility in system design.
- Single 1.8 V supply simplifies system power supply design.
- Serial port control for various product functions such as data formatting, disabling the clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.
- Pin-compatible family offered as AD9230 for 12-bit resolution.
- Programmable input voltage range of 1.0 V to 1.5 V, with a nominal value of 1.25 V.
- Integrated input buffer and track-and-hold.
Applications
- Wireless and wired broadband communications.
- Cable reverse path.
- Communications test equipment.
- Radar and satellite subsystems.
- Power amplifier linearization.
Q & A
- What is the maximum conversion rate of the AD9211BCPZ-300?
The AD9211BCPZ-300 operates at up to 300 MSPS.
- What is the signal-to-noise ratio (SNR) of the AD9211BCPZ-300 at 300 MSPS with a 70 MHz input?
The SNR is 60.1 dBFS.
- What is the power consumption of the AD9211BCPZ-300 at 300 MSPS in LVDS SDR mode?
The power consumption is 437 mW.
- What type of output format does the AD9211BCPZ-300 support?
The device supports LVDS (ANSI-644), twos complement, offset binary, and Gray code output formats.
- What is the operating temperature range of the AD9211BCPZ-300?
The operating temperature range is −40°C to +85°C.
- Does the AD9211BCPZ-300 have an on-chip reference and sample-and-hold?
Yes, it includes an on-chip reference and sample-and-hold.
- What is the analog input bandwidth of the AD9211BCPZ-300?
The analog input bandwidth is 700 MHz full power.
- Is the AD9211BCPZ-300 pin-compatible with other devices?
Yes, it is pin-compatible with the 12-bit AD9230 family.
- What supply voltage does the AD9211BCPZ-300 require?
The device requires a 1.8 V analog and digital supply voltage.
- What package type is the AD9211BCPZ-300 available in?
The device is available in a 56-Lead LFCSP (8mm x 8mm w/ EP) package.
