Overview
The AD9211BCPZ-200 is a 10-bit monolithic sampling analog-to-digital converter (ADC) produced by Analog Devices Inc. This device is optimized for high performance, low power consumption, and ease of use. It operates at conversion rates of up to 300 MSPS and is designed for outstanding dynamic performance in wideband carrier and broadband systems. The AD9211 includes all necessary functions such as a track-and-hold (T/H) and voltage reference on the chip, providing a complete signal conversion solution.
The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support various data formats including twos complement, offset binary, and Gray code. The device is fabricated on an advanced CMOS process and is available in a 56-lead LFCSP package, specified over the industrial temperature range of −40°C to +85°C.
Key Specifications
Specification | Value |
---|---|
Resolution | 10 bits |
Sampling Rate | Up to 300 MSPS |
Signal to Noise Ratio (SNR) | 60.1 dBFS @ 300 MSPS with a 70 MHz input |
Effective Number of Bits (ENOB) | 9.7 @ 300 MSPS (−1.0 dBFS) |
Spurious Free Dynamic Range (SFDR) | −80 dBc @ 300 MSPS (−1.0 dBFS) |
Differential Nonlinearity (DNL) | ±0.1 LSB typical |
Integral Nonlinearity (INL) | ±0.2 LSB typical |
Analog Supply Voltage | 1.8 V |
Digital Supply Voltage | 1.8 V |
Power Dissipation | 437 mW @ 300 MSPS (LVDS SDR mode), 410 mW @ 300 MSPS (LVDS DDR mode) |
Operating Temperature Range | −40°C to +85°C |
Package Type | 56-Lead LFCSP (8mm x 8mm w/ EP) |
Key Features
- High performance with 60.1 dBFS SNR @ 300 MSPS and a 70 MHz input.
- Low power consumption: 437 mW @ 300 MSPS (LVDS SDR mode) and 410 mW @ 300 MSPS (LVDS DDR mode).
- Ease of use with LVDS output data and output clock signal, compatible with current FPGA technology.
- On-chip reference and sample-and-hold for flexibility in system design.
- Single 1.8 V supply simplifies system power supply design.
- Standard serial port interface for various product functions such as data formatting, power-down, gain adjust, and output test pattern generation.
- Pin-compatible family offered as AD9230 (12-bit).
- Integrated input buffer and track-and-hold.
- Programmable input voltage range: 1.0 V to 1.5 V, 1.25 V nominal.
- 700 MHz full power analog bandwidth.
Applications
- Wireless and wired broadband communications.
- Cable reverse path.
- Communications test equipment.
- Radar and satellite subsystems.
- Power amplifier linearization.
Q & A
- What is the maximum sampling rate of the AD9211BCPZ-200?
The AD9211BCPZ-200 can operate at sampling rates up to 300 MSPS.
- What is the signal to noise ratio (SNR) of the AD9211BCPZ-200 at 300 MSPS?
The SNR is 60.1 dBFS @ 300 MSPS with a 70 MHz input.
- What type of output interface does the AD9211BCPZ-200 use?
The digital outputs are LVDS (ANSI-644) compatible.
- What is the power dissipation of the AD9211BCPZ-200 at 300 MSPS?
The power dissipation is 437 mW @ 300 MSPS (LVDS SDR mode) and 410 mW @ 300 MSPS (LVDS DDR mode).
- What is the operating temperature range of the AD9211BCPZ-200?
The operating temperature range is −40°C to +85°C.
- Does the AD9211BCPZ-200 have an on-chip reference and sample-and-hold?
- What is the full power analog bandwidth of the AD9211BCPZ-200?
The full power analog bandwidth is 700 MHz.
- Is the AD9211BCPZ-200 pin-compatible with other devices?
- What types of applications is the AD9211BCPZ-200 suitable for?
- Does the AD9211BCPZ-200 support different output data formats?