Overview
The TMS320F28379DZWTT is a powerful 32-bit floating-point microcontroller unit (MCU) from Texas Instruments, designed for advanced closed-loop control applications. This device features a dual-core architecture based on TI's 32-bit C28x CPUs, each operating at 200 MHz. The MCU is part of the C2000 Delfino family and is optimized for high-performance real-time control in various industrial and automotive applications.
The dual-core design, along with specialized accelerators and integrated peripherals, significantly enhances system performance and allows for efficient multitasking. The device supports various development kits, including the DigitalPower and MotorControl SDKs, to accelerate application development.
Key Specifications
| Specification | Details |
|---|---|
| CPU | Dual 32-bit C28x with Floating-Point Unit (FPU) |
| Clock Speed | Up to 200 MHz |
| Flash Memory | Up to 1 MB (512 KW) with ECC protection |
| RAM | Up to 204 KB (102 KW) with ECC or parity protection |
| ADCs | Four independent 16-bit ADCs (24 channels total) |
| ePWM Channels | Up to 24 |
| Interfaces | SPI, UART, CAN, I2C, LIN, Ethernet |
| Operating Voltage | 3.3V |
| Temperature Range | -40°C to 125°C |
| Package Type | NFBGA (337-ball) |
Key Features
- Dual-core architecture with two TMS320C28x 32-bit CPUs, each with an IEEE 754 single-precision Floating-Point Unit (FPU)
- Trigonometric Math Unit (TMU) and Viterbi/Complex Math Unit (VCU-II) for enhanced mathematical operations
- Two programmable Control Law Accelerators (CLAs) operating at 200 MHz, executing code independently of the main CPU
- Integrated analog and control peripherals, including four independent 16-bit ADCs and multiple ePWM channels
- Multiple communication interfaces such as SPI, UART, CAN, I2C, LIN, and Ethernet, along with EtherCAT support
- Dual-zone security supporting third-party development and unique identification number
- Clock and system control features including two internal zero-pin 10MHz oscillators and on-chip crystal oscillator
Applications
- Industrial motor drives, servo systems, and robotics
- Solar inverters, uninterruptible power supplies (UPS), and power converters
- Programmable logic controllers (PLCs)
- Electric vehicle chargers and automotive-grade motor control systems
- Wind and solar energy systems, grid-tied inverters
Q & A
- What is the core architecture of the TMS320F28379DZWTT?
The TMS320F28379DZWTT features a dual-core architecture with two TMS320C28x 32-bit CPUs, each operating at 200 MHz.
- What type of memory does the TMS320F28379DZWTT have?
The device has up to 1 MB of flash memory with ECC protection and up to 204 KB of RAM with ECC or parity protection.
- What are the key mathematical accelerators in the TMS320F28379DZWTT?
The device includes a Trigonometric Math Unit (TMU), Viterbi/Complex Math Unit (VCU-II), and two programmable Control Law Accelerators (CLAs).
- What communication interfaces are supported by the TMS320F28379DZWTT?
The device supports SPI, UART, CAN, I2C, LIN, Ethernet, and EtherCAT interfaces.
- What is the operating voltage and temperature range of the TMS320F28379DZWTT?
The operating voltage is 3.3V, and the temperature range is -40°C to 125°C.
- What are some of the key applications of the TMS320F28379DZWTT?
Key applications include industrial motor drives, solar inverters, programmable logic controllers, electric vehicle chargers, and wind and solar energy systems.
- Does the TMS320F28379DZWTT support any development kits?
Yes, it supports the DigitalPower and MotorControl software development kits (SDKs) for C2000 MCUs.
- What type of security features does the TMS320F28379DZWTT have?
The device features dual-zone security supporting third-party development and a unique identification number.
- What is the package type of the TMS320F28379DZWTT?
The device is available in an NFBGA (337-ball) package.
- What are the benefits of the dual-core architecture in the TMS320F28379DZWTT?
The dual-core architecture significantly boosts system performance and allows for efficient multitasking, enabling intelligent partitioning between various system tasks.
