Overview
The TMS320DM642AZDKA5, produced by Texas Instruments, is a high-performance video/imaging fixed-point digital signal processor (DSP). It is part of the TMS320C64x™ DSP generation within the TMS320C6000™ DSP platform. This device is based on the second-generation advanced VelociTI™ very-long-instruction-word (VLIW) architecture, known as VelociTI.2™. With a clock rate of up to 720 MHz, the DM642 offers up to 5760 million instructions per second (MIPS), making it an excellent choice for digital media applications.
Key Specifications
Specification | Details |
---|---|
Instruction Cycle Time | 2 ns, 1.67 ns, 1.39 ns |
Clock Rate | 500 MHz, 600 MHz, 720 MHz |
Instructions per Cycle | Eight 32-Bit Instructions |
MIPS | 4000, 4800, 5760 |
Functional Units | Eight highly independent functional units with VelociTI.2™ extensions:
|
Cache Memory |
|
External Memory Space | 1024M-Byte Total Addressable External Memory Space |
Package Type | FCBGA (ZDK) package with 548 pins |
Voltage | Core: 1.2 V - 1.4 V, I/O: 3.3 V |
Process Technology | 0.13 µm |
Key Features
- High-performance digital media processor with up to 5760 MIPS at 720 MHz clock rate
- Eight highly independent functional units with VelociTI.2™ extensions, including six ALUs and two multipliers
- Support for single 32-bit, dual 16-bit, or quad 8-bit arithmetic per clock cycle
- Byte-addressable (8-/16-/32-/64-Bit data) with 8-bit overflow protection and bit-field operations
- Glueless interface to asynchronous and synchronous memories (SRAM, EPROM, SDRAM, SBSRAM, ZBT SRAM, FIFO)
- IEEE 802.3 compliant with Media Independent Interface (MII) and 10/100 Mb/s Ethernet MAC (EMAC)
- Three configurable video ports providing a glueless interface to common video decoder and encoder devices
- Supports multiple resolutions and video standards, and audio/video synchronization
- 32-Bit/66-MHz, 3.3-V Peripheral Component Interconnect (PCI) Master/Slave Interface
- Host-Port Interface (HPI) [32-/16-Bit] and Multichannel Audio Serial Port (McASP)
Applications
The TMS320DM642AZDKA5 is designed for high-performance digital media applications, including:
- Video and imaging processing
- Audio and video encoding and decoding
- Real-time video streaming and processing
- High-definition video applications
- Embedded systems requiring advanced DSP capabilities
Q & A
- What is the maximum clock rate of the TMS320DM642AZDKA5?
The maximum clock rate is 720 MHz.
- How many instructions can the TMS320DM642AZDKA5 execute per cycle?
It can execute eight 32-bit instructions per cycle.
- What is the total addressable external memory space of the TMS320DM642AZDKA5?
The total addressable external memory space is 1024M-Byte.
- Does the TMS320DM642AZDKA5 support Ethernet?
Yes, it supports IEEE 802.3 compliant 10/100 Mb/s Ethernet MAC (EMAC).
- What type of cache memory does the TMS320DM642AZDKA5 have?
It has 128K-Bit L1P program cache, 128K-Bit L1D data cache, and 2M-Bit L2 unified mapped RAM/cache.
- Is the TMS320DM642AZDKA5 software-compatible with other C64x™ DSPs?
Yes, it is fully software-compatible with other C64x™ DSPs.
- What is the package type of the TMS320DM642AZDKA5?
The package type is FCBGA (ZDK) with 548 pins.
- Does the TMS320DM642AZDKA5 support audio/video synchronization?
Yes, it supports audio/video synchronization.
- What is the process technology used in the TMS320DM642AZDKA5?
The process technology is 0.13 µm.
- What are the voltage requirements for the TMS320DM642AZDKA5?
The core voltage is 1.2 V - 1.4 V, and the I/O voltage is 3.3 V.