Overview
The TMS320DM368 from Texas Instruments is a high-performance Digital Media System-on-Chip (DMSoC) designed to deliver crystal clear multi-format video processing. This device is part of the DaVinci video processor family and is pin-to-pin compatible with the DM365 processors. It features an ARM926EJ-S core operating at 432 MHz, supporting both 32-bit and 16-bit instruction sets. The DM368 is capable of handling HD video processing at up to 1080p at 30fps in H.264 format, making it ideal for various digital video applications.
Key Specifications
| Specification | Details |
|---|---|
| Processor Core | ARM926EJ-S™ Core, 432 MHz |
| Instruction Sets | 32-Bit and 16-Bit (Thumb® Mode) |
| Memory | 16-KB I-cache, 8-KB D-cache, 32-KB RAM, 16-KB ROM |
| Memory Controllers | DDR2 / mDDR (16-bit bus width), Asynchronous EMIF (AEMIF), NOR, NAND, OneNAND |
| Video Processing | HDVICP and MJCP Engines, Supports H.264BP/MP/HP, MPEG-4, MPEG-2, MJPEG, VC1/WMV9 |
| Peripherals | Two UARTs, Five SPI, One I2C, 10/100 Mb/s Ethernet MAC, Multi-Channel Buffered Serial Port (McBSP) |
| Power Management | Power Management and Real Time Clock Subsystem (PRTCSS), Various power-saving modes |
| Package | 338-Pin NFBGA (ZCE), 13 x 13 mm |
| Process Technology | 65 nm |
Key Features
- High-Performance ARM926EJ-S Core: Operating at 432 MHz with support for 32-bit and 16-bit instruction sets.
- Video Processing Subsystem: Includes HDVICP and MJCP engines for efficient video encoding and decoding.
- Multiple Codecs Support: Supports H.264BP/MP/HP, MPEG-4, MPEG-2, MJPEG, and VC1/WMV9 codecs.
- Advanced Peripherals: Includes two UARTs, five SPI interfaces, one I2C interface, and a 10/100 Mb/s Ethernet MAC.
- Power Management: Features a Power Management and Real Time Clock Subsystem (PRTCSS) with various power-saving modes.
- Memory and Storage: Supports DDR2/mDDR, asynchronous EMIF, NOR, NAND, and OneNAND flash.
- Analog and Digital Interfaces: Includes analog-to-digital converters, digital video encoders, and high-speed USB 2.0 OTG.
Applications
- Digital Video Devices: Ideal for HD video cameras, digital video recorders, and other multimedia devices.
- Surveillance Systems: Suitable for IP cameras and other surveillance equipment requiring high-quality video processing.
- Industrial Automation: Can be used in industrial automation systems that require advanced video and data processing.
- Medical Devices: Applicable in medical imaging and diagnostic equipment that need high-resolution video capabilities.
- Consumer Electronics: Used in various consumer electronics such as set-top boxes, digital media players, and more.
Q & A
- What is the core frequency of the TMS320DM368?
The core frequency of the TMS320DM368 is 432 MHz.
- What video codecs does the TMS320DM368 support?
The TMS320DM368 supports H.264BP/MP/HP, MPEG-4, MPEG-2, MJPEG, and VC1/WMV9 codecs.
- What type of memory does the TMS320DM368 support?
The TMS320DM368 supports DDR2/mDDR, asynchronous EMIF, NOR, NAND, and OneNAND flash.
- Does the TMS320DM368 have built-in power management features?
Yes, the TMS320DM368 features a Power Management and Real Time Clock Subsystem (PRTCSS) with various power-saving modes.
- What is the package type and pin count of the TMS320DM368?
The TMS320DM368 comes in a 338-Pin NFBGA (ZCE) package, measuring 13 x 13 mm.
- What process technology is used in the TMS320DM368?
The TMS320DM368 is fabricated using 65 nm process technology.
- Does the TMS320DM368 support high-speed interfaces?
Yes, the TMS320DM368 supports high-speed interfaces such as USB 2.0 OTG and 10/100 Mb/s Ethernet MAC.
- What are some common applications of the TMS320DM368?
The TMS320DM368 is commonly used in digital video devices, surveillance systems, industrial automation, medical devices, and consumer electronics.
- Is the TMS320DM368 pin-to-pin compatible with other processors?
Yes, the TMS320DM368 is pin-to-pin compatible with the DM365 processors.
- What is the purpose of the HDVICP and MJCP engines in the TMS320DM368?
The HDVICP and MJCP engines are used for efficient video encoding and decoding, offloading compression tasks from the main ARM core.
