Overview
The TMS320C6711D, part of the TMS320C6000 DSP platform, is a high-performance floating-point Digital Signal Processor (DSP) developed by Texas Instruments. This device, including the specific variant TMS320C6711CGDP200, is based on the advanced Very Long Instruction Word (VLIW) architecture, making it an excellent choice for multichannel and multifunction applications. The C6711D offers operational flexibility akin to high-speed controllers and the numerical capability of array processors, making it suitable for a wide range of high-performance DSP programming challenges.
Key Specifications
| Specification | Details |
|---|---|
| Clock Rates | 167 MHz, 200 MHz, 250 MHz |
| Instruction Cycle Time | 6 ns, 5 ns, 4 ns |
| Performance | Up to 1200 MFLOPS at 200 MHz, up to 1500 MFLOPS at 250 MHz |
| Functional Units | Eight highly independent functional units: four floating-/fixed-point ALUs, two fixed-point ALUs, two floating-/fixed-point multipliers |
| Registers | 32 general-purpose registers of 32-bit word length |
| Cache Architecture | Level 1 program cache (L1P): 32-Kbit direct mapped cache, Level 1 data cache (L1D): 32-Kbit 2-way set-associative cache, Level 2 memory/cache (L2): 512-Kbit shared between program and data space |
| Memory Interface | Glueless interface to SDRAM, SBSRAM, and asynchronous memories |
| External Memory Space | 256 MByte total addressable external memory space |
| Host-Port Interface | 16-bit Host-Port Interface (HPI) |
| Serial Ports | Two multichannel buffered serial ports (McBSPs) |
| Timers | Two 32-bit general-purpose timers |
| GPIO Module | Dedicated general-purpose input/output (GPIO) module with 5 pins |
| Package | 272-pin Ball Grid Array (BGA) package |
| Technology | CMOS technology, 0.13-µm/6-Level Copper Metal Process |
| Voltage | 3.3-V I/O, 1.4-V internal (for 250 MHz variant) |
Key Features
- Advanced VLIW Architecture: Supports eight 32-bit instructions per cycle, enhancing performance and efficiency.
- High-Performance Functional Units: Includes four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers.
- Cache and Memory Architecture: Features a two-level cache-based architecture with L1 and L2 caches, and a flexible memory configuration.
- Peripheral Set: Includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF).
- Development Tools: Supports a new C compiler, an assembly optimizer, and a Windows debugger interface for comprehensive development and debugging.
- IEEE Compliance: Supports IEEE single-precision and double-precision instructions and is IEEE-1149.1 (JTAG) boundary-scan-compatible.
Applications
- Multichannel and Multifunction Systems: Ideal for applications requiring simultaneous processing of multiple channels and functions.
- High-Performance Signal Processing: Suitable for applications demanding high-speed signal processing, such as audio, video, and image processing.
- Telecommunications: Can be used in telecommunications equipment for tasks like voice and data processing.
- Industrial Control Systems: Applicable in industrial control systems that require high-speed numerical processing and control capabilities.
- Medical Devices: Can be used in medical devices that require advanced signal processing, such as in medical imaging and diagnostics.
Q & A
- What is the maximum clock rate of the TMS320C6711D?
The maximum clock rate of the TMS320C6711D is 250 MHz.
- What is the performance of the TMS320C6711D in terms of MFLOPS?
The TMS320C6711D can perform up to 1200 MFLOPS at 200 MHz and up to 1500 MFLOPS at 250 MHz.
- How many functional units does the TMS320C6711D have?
The TMS320C6711D has eight highly independent functional units.
- What type of cache architecture does the TMS320C6711D use?
The TMS320C6711D uses a two-level cache-based architecture with L1 and L2 caches.
- What is the total addressable external memory space of the TMS320C6711D?
The total addressable external memory space is 256 MBytes.
- Does the TMS320C6711D support IEEE single-precision and double-precision instructions?
- What is the package type of the TMS320C6711D?
The TMS320C6711D is available in a 272-pin Ball Grid Array (BGA) package.
- What development tools are available for the TMS320C6711D?
The TMS320C6711D has a new C compiler, an assembly optimizer, and a Windows debugger interface available for development and debugging.
- Is the TMS320C6711D compatible with JTAG boundary scan?
- What are some common applications of the TMS320C6711D?
