Overview
The TMS320C6678CYPA is a high-performance multicore fixed and floating-point digital signal processor (DSP) from Texas Instruments, based on the KeyStone multicore architecture. This device integrates eight TMS320C66x DSP Core Subsystems, each capable of operating at frequencies up to 1.4 GHz. The C6678 is designed to support a wide range of high-performance signal processing applications, including mission-critical systems, high-performance computing, communications, audio, video infrastructure, imaging, analytics, networking, media processing, and industrial automation. The device is power-efficient, easy to use, and fully backward compatible with the existing C6000 family of fixed and floating-point DSPs.
Key Specifications
| Parameter | Description |
|---|---|
| Number of Cores | Eight TMS320C66x DSP Core Subsystems |
| Core Frequency | Up to 1.0 GHz, 1.25 GHz, or 1.4 GHz |
| Performance | 44.8 GMAC/Core for Fixed Point @ 1.4 GHz, 22.4 GFLOP/Core for Floating Point @ 1.4 GHz |
| Cache Memory | 32KB L1P and 32KB L1D per core, 512KB Local L2 per core |
| Shared Memory | 4096KB Multicore Shared Memory (MSM SRAM) |
| External Memory Interface | 64-bit DDR-3 EMIF running at 1600 MHz with ECC DRAM support |
| Interfaces | RapidIO ver 2, PCI Express Gen2, Gigabit Ethernet, I2C, UART, TSIP, and 16-bit EMIF |
| Package | FCBGA-841 |
| Timers | Sixteen 64-Bit Timers |
| PLLs | Three On-Chip PLLs |
Key Features
- High-performance signal processing with up to 11.2 GHz cumulative DSP performance
- KeyStone multicore architecture with Multicore Navigator, TeraNet, Multicore Shared Memory Controller, and HyperLink
- Efficient data management through the Multicore Navigator and TeraNet switch fabric
- Integrated packet accelerator and network co-processor for high-speed networking and security acceleration
- Support for high-speed interfaces including RapidIO, PCI Express Gen2, and Gigabit Ethernet
- 50-Gbaud full-duplex HyperLink interface for low-latency communication
- Comprehensive development tools including enhanced C compiler, assembly optimizer, and Windows debugger interface
Applications
- Mission-critical systems
- High-performance computing systems
- Communications and telecom
- Audio and video infrastructure
- Imaging and analytics
- Networking and media processing
- Industrial automation and process control
- Medical imaging, test, and automation
Q & A
- What is the TMS320C6678CYPA based on?
The TMS320C6678CYPA is based on Texas Instruments' KeyStone multicore architecture.
- How many DSP cores does the TMS320C6678CYPA have?
The device integrates eight TMS320C66x DSP Core Subsystems.
- What are the operating frequencies of the DSP cores?
The DSP cores can operate at frequencies up to 1.0 GHz, 1.25 GHz, or 1.4 GHz.
- What is the performance of each DSP core?
Each core provides 44.8 GMAC for fixed-point operations and 22.4 GFLOP for floating-point operations at 1.4 GHz.
- What type of memory does the TMS320C6678CYPA have?
The device includes 32KB L1P and L1D cache per core, 512KB local L2 memory per core, and 4096KB multicore shared memory.
- What external memory interface does the TMS320C6678CYPA support?
The device supports a 64-bit DDR-3 external memory interface running at 1600 MHz with ECC DRAM support.
- What high-speed interfaces are supported by the TMS320C6678CYPA?
The device supports RapidIO ver 2, PCI Express Gen2, Gigabit Ethernet, and other high-speed interfaces.
- What is the HyperLink interface used for?
The HyperLink interface is a 50-Gbaud full-duplex interface for low-latency communication between devices or with an FPGA.
- What development tools are available for the TMS320C6678CYPA?
The device comes with comprehensive development tools including an enhanced C compiler, assembly optimizer, and Windows debugger interface.
- Is the TMS320C6678CYPA backward compatible with other DSPs?
Yes, the C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating-point DSPs.
